Things like encryption would certainly benefit from 128-bit operations. The trend seems to be to implement instructions for the encryption algorithms rather than instructions that would generically accelerate encryption algorithms, so the usefulness of 128-bit operations is diminished.
The other major computational area that historically benefited from larger machine word sizes was HPC. HPC applications seem to be fine with 64-bit precision, so there is no motivation for it from them unlike how there was with 64-bit.
With the exception of the SGI UV2000 and SGI UV3000, people are not using the 46-bit physical address space available on 64-bit Intel processors, so the necessity of increasing memory address sizes from 64-bits is quite far away. We would need ~18 die shrinks before 64-bit physical memory becomes limiting to us in the same way 46-bit physical memory is now.
If we assume that we can continue doing die shrinks until we reach a single silicon atom that has a diameter of 210 pm, we would be able to do another 6 die shrinks (14nm -> 210pm) before hitting the limits of miniaturization, although most people seem to think we can only do 3 or 4 more. Wikipedia lists 10nm, 7nm and 5nm, with a half node at 4nm:
Assuming that people do manage to do those 6, we would need the equivalent of 12 more in addition to those 6 for 64-bit to be as limiting as 46-bit is today. 3D might help, although we would be talking about 4096 layer chips and there is still heat dissipation to consider, which would probably require enough volume that more layers would be needed to make up for it. Memristors might help there, but they would need to be shrunken down to physical limits too. We are a long way from machines needing more than 64-bit memory addresses.
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[ 0.12 ms ] story [ 15.2 ms ] threadThe other major computational area that historically benefited from larger machine word sizes was HPC. HPC applications seem to be fine with 64-bit precision, so there is no motivation for it from them unlike how there was with 64-bit.
With the exception of the SGI UV2000 and SGI UV3000, people are not using the 46-bit physical address space available on 64-bit Intel processors, so the necessity of increasing memory address sizes from 64-bits is quite far away. We would need ~18 die shrinks before 64-bit physical memory becomes limiting to us in the same way 46-bit physical memory is now.
If we assume that we can continue doing die shrinks until we reach a single silicon atom that has a diameter of 210 pm, we would be able to do another 6 die shrinks (14nm -> 210pm) before hitting the limits of miniaturization, although most people seem to think we can only do 3 or 4 more. Wikipedia lists 10nm, 7nm and 5nm, with a half node at 4nm:
https://en.wikipedia.org/wiki/Die_shrink
Assuming that people do manage to do those 6, we would need the equivalent of 12 more in addition to those 6 for 64-bit to be as limiting as 46-bit is today. 3D might help, although we would be talking about 4096 layer chips and there is still heat dissipation to consider, which would probably require enough volume that more layers would be needed to make up for it. Memristors might help there, but they would need to be shrunken down to physical limits too. We are a long way from machines needing more than 64-bit memory addresses.