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CVC is a truly industrial strength Verilog simulator, something that the EDA world desperately needs. It WILL do FULLY back-annotated SDF simulations for ASIC and FPGA designs, it is compiled and FAST, and is open source.

It is a project that definitely deserves attention.

Yes! Tachyon Design Automation was formerly Pragmatic C Software.

It looks like GPL cver is an ancestor to the current CVC; CVC currently supports Verilog 2005.

Any SystemVerilog support at all? For better or worse, at least some SV constructs are leaking into a lot of RTL code.