Deterministic Components for Interactive Distributed Systems (ithare.com) 43 points by alexkon 9y ago ↗ HN
[–] fapjacks 9y ago ↗ I thought the format of the information presented on this site would make the information hard to consume, but for some reason, it was the opposite.
[–] camkego 9y ago ↗ Looks awesome, any chance the a video of the presentation is, or will be available? [–] camkego 9y ago ↗ It is also worth noting this seems like it relates to the way hardware RTL (VHDL/Verilog) designers basically build and test their systems. I think that software developers in general have a few things to learn from the hardware guys about testing. [–] krupan 9y ago ↗ Are you sure?http://insights.sigasi.com/opinion/jan/verilogs-major-flaw.h...(tl;dr Verilog itself is non-deterministic) [–] ramchip 9y ago ↗ > I think that software developers in general have a few things to learn from the hardware guys about testing.People say that a lot, but do you have any concrete suggestions?I find there's a big difference between testing when it's half your budget (HW), and when it's 10 or 20% (SW).
[–] camkego 9y ago ↗ It is also worth noting this seems like it relates to the way hardware RTL (VHDL/Verilog) designers basically build and test their systems. I think that software developers in general have a few things to learn from the hardware guys about testing. [–] krupan 9y ago ↗ Are you sure?http://insights.sigasi.com/opinion/jan/verilogs-major-flaw.h...(tl;dr Verilog itself is non-deterministic) [–] ramchip 9y ago ↗ > I think that software developers in general have a few things to learn from the hardware guys about testing.People say that a lot, but do you have any concrete suggestions?I find there's a big difference between testing when it's half your budget (HW), and when it's 10 or 20% (SW).
[–] krupan 9y ago ↗ Are you sure?http://insights.sigasi.com/opinion/jan/verilogs-major-flaw.h...(tl;dr Verilog itself is non-deterministic)
[–] ramchip 9y ago ↗ > I think that software developers in general have a few things to learn from the hardware guys about testing.People say that a lot, but do you have any concrete suggestions?I find there's a big difference between testing when it's half your budget (HW), and when it's 10 or 20% (SW).
5 comments
[ 3.1 ms ] story [ 27.5 ms ] threadhttp://insights.sigasi.com/opinion/jan/verilogs-major-flaw.h...
(tl;dr Verilog itself is non-deterministic)
People say that a lot, but do you have any concrete suggestions?
I find there's a big difference between testing when it's half your budget (HW), and when it's 10 or 20% (SW).