First of all: nice job. I can see how this can be useful for some small FPGA hobby projects.
However, once you go one step above that, I think that nothing beats something in text format: it can be checked in with the rest of your project so you can't even have a disconnect between register definition and RTL, and a simple dependency in your Makefile ensures a quick turn-around.
Most companies small and large already have such system, often developed in-house, but for those that haven't, I suggest having a look at ORDT, an open-source tool from Juniper that does pretty much exactly what airhdl does, with the main difference that it starts from the standardized RDL format.
Thanks but this is by far not limited to small FPGA hobby projects.
I'm a professional FPGA consultant, Xilinx Alliance Program Associate Partner, working on serious FPGA projects for all kinds of applications. Defence, medical, telecom, space, industrial, things like that. And I've been using airhdl in many of them.
During the past 8 years, I've worked on dozens of FPGA projects in many different teams. Guess how many of them were using automatic register generation? Zero.
This is why I created airhdl; because we all have better things to do than hand-code register files.
My bet was that if I removed all barriers of entry, then developers would come. That's why it's web-based: nothing to install, nothing to license, no IT person to ask permission for, runs on any platform. That's why it has a GUI: no XML or RDL hacking required. And that's why it's free: so you can start using it right away, no purchase order required.
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[ 4.5 ms ] story [ 15.3 ms ] threadHowever, once you go one step above that, I think that nothing beats something in text format: it can be checked in with the rest of your project so you can't even have a disconnect between register definition and RTL, and a simple dependency in your Makefile ensures a quick turn-around.
Most companies small and large already have such system, often developed in-house, but for those that haven't, I suggest having a look at ORDT, an open-source tool from Juniper that does pretty much exactly what airhdl does, with the main difference that it starts from the standardized RDL format.
https://github.com/Juniper/open-register-design-tool
I'm a professional FPGA consultant, Xilinx Alliance Program Associate Partner, working on serious FPGA projects for all kinds of applications. Defence, medical, telecom, space, industrial, things like that. And I've been using airhdl in many of them.
During the past 8 years, I've worked on dozens of FPGA projects in many different teams. Guess how many of them were using automatic register generation? Zero.
This is why I created airhdl; because we all have better things to do than hand-code register files.
My bet was that if I removed all barriers of entry, then developers would come. That's why it's web-based: nothing to install, nothing to license, no IT person to ask permission for, runs on any platform. That's why it has a GUI: no XML or RDL hacking required. And that's why it's free: so you can start using it right away, no purchase order required.