Ask HN: What is likely to improve with 10/7nm CPUs?

all of the above can happen. smaller transsistors give you room to put more transistors on a chip or reduce the power. One can do a mix also. So vendors choose what is going to happen. In the competition between Intel and AMD I see that Intel only wins on one point: single thread performance. So to compete better AMD will do its utmost best to improve their single thread performance.

AMD has come out and said that they will be skipping 10nm in favor of 7nm chip designs, and, as for what will improve, it is likely everything.

Overall performance per watt is up in addition to raw clock speed ceilings and core counts, and subsequently we will see low-power mobile devices (ie: laptops, tablets) receive impressive performance uplifts.

That said, Intel is currently floundering so we will see AMD taking a much larger slice of pies across all device profiles.

Not much for you I’m afraid. L1 size likely to not change significantly to maintain access latencies. Frequencies are not going to increase because of power. Core capabilities will not change I’m any significant ways either. The best bet is more LLC.

In you believe Intel's tech brief, the move to 10nm vs their current 14nm+++ will:

1) Have somewhat lower peak performance, i.e. peak clock rates are lower and won't surpass 14+++ till 10++.

2) Have ~2.7x higher density

3) Have ~45% lower power usage

My thoughts: #1 and #3 are intertwined, lower peak performance doesn't mean that products will actually be clocked lower. In a lot of cases the operational frequency is limited by thermals, so cutting power usage can mean higher frequencies in practice. Adding in #2 and what I think we'll see is that single threaded performance isn't going to improve much except in thermally constrained situations. We'll see CPUs of similar core count / performance as today but at notably lower power, and CPUs with similar clock speeds/power as today with ~50% more cores (or transistors in general).

EDIT: One other possibility on the single threaded front - higher density can mean tighter timings are possible. e.g. it's possible they can do an architecture refresh that cuts the number of cycles for executing slower instruction, or possibly shorten cache latency, etc.

Not much. Clock wall, power wall, and latency wall are here.

The only thing improving is memory size, bandwidth, and number of cores.

Now, we are still very far off from every worload being at its theoretically maximum throughput (that would be achieved with an ASIC).

Over the next years, the interesting things won't come from Intel or AMD. The generic processor killing all competition has reached an end. Intel could just wait till the next technology node to thwart off any attempt of adapting to a corner of the market. This is no longer the case; with so much money at stake, expect a Cambrian explosion.

It will come from specialized workloads getting an accelerator (think integrated TPUs, NICs with FPGAs, etc); it will come from tighter chip packaging/integration (think close-access DRAM a few μm from the CPU with silicon vias, early filtering with predicate pushdown directly into the SSD controller, etc.).

Now, the code will have to adapt; and I posit that the languages better suited for this should have:

* An easy way to control the memory layout

* An easy way to insert special-purpose instructions

* A compiler infrastructure flexible enough to be able to coerce code into the accelerators

* An easy way to serialize (possibly half-executed-)code that should be transported closer to the data