im thinking this could be coupled with architechture on demand [AoD] default state something like pseudo i8008
until the appropriate trigger for pseudo gen 11 mode occurs
this of course all requires local control of microcode.
couple this with a volatile programmable gate array and you not only change the microcode but you physically change/stealth, the on-chip resources that are available
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[ 3.1 ms ] story [ 17.2 ms ] threadthis of course all requires local control of microcode. couple this with a volatile programmable gate array and you not only change the microcode but you physically change/stealth, the on-chip resources that are available