For anyone who wants to dip their toe in integrated circuits (ASIC), this project provides a way to get a tiny (~200 gate) project onto a physical chip. You can do the whole thing in the browser. Deadline for submission is September 1st.
Are you the author? I've read the slides but can't find the details. What kind cell library this project use? I know from someone in the IC design industry said that it's kind of hard to access all the tools and semiconductor IPs without some kind of NDA or agreement with library vendors and foundry.
This uses the Skywater 130 process. It’s backed by an open source PDK (SKY130B), and is going to be taped out via an Efabless shuttle, just like OpenMPW shuttles sponsored by Google.
The difference between this and a ‘plain’ OpenMPW shuttle is that this can fit a ton of tiny/toy/demo designs, enabling a lot of people to get their toes wet with ASIC design without having to take up a ‘large’ shuttle spot.
The Skywater shuttles are never full, to the best of my knowledge. However, it is a lot of work to get off the ground with the PDK (synthesis and physical design for chips is a totally separate set of skills on top of logic design), so if this further lowers the barrier to entry then that's fantastic
Actually, all of the open shuttles have been full with the last few oversubscribed by larger and larger margins (about 100% for MPW6 if I remember correctly).
It was the commercial shuttles, called ChipIgnite, that have had space left over.
I had in mind that OpenMPW-1 was not quite full, and looking now on efabless.com I see 37 projects submitted for MPW-1.
but i don’t think it really matters - there have been lots of submissions for all of them and a ton of cool stuff, and yeah the recent open shuttles are definitely full :)
Maybe an idea: Could I use this to put a secret key in the gates, with some mechanism to prevent brute-force breaking? So my own personal Yubikey essentially.
Not sure how to protect against replay, with only 200 gates...
It mentions a possible set of dip switches and a 7 segment LED. You could make a puzzle game of "lights out" where only a certain combo of switches would have all the segments off.
"I could make a motor driver!" was the first thing that came to mind. I have a need for lots of motor driver chips for an art project. (Think hundreds or thousands of small DC motors.) At a minimum, a basic "h-bridge" circuit to control one motor is 4 transistors (and possibly 4 additional diodes). I'll still have to figure out if TinyTapeout could handle the voltage and current of one small DV motor, though. (5-12V, possibly up to 800mA). Of course, there are simple h-bridge chips already on the market for $0.20/chip, but designing my own would be fun.
If one could integrate some logic that can be communicated with over a digital protocol it would get real interesting. Maybe it could be the start of an open source I/O chip for the Klipper 3d-printer firmware.
The output stage could be using discrete SMD components, to get sufficient power capacity.
WS2811 and similar have a dedicated control signal line, and power+ground (3 leads total). I'd like to combine power and control, so that there is only two. Mostly because it allows to be compatible all the existing non-smart DC stuff.
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[ 0.27 ms ] story [ 72.7 ms ] threadThis uses the Skywater 130 process. It’s backed by an open source PDK (SKY130B), and is going to be taped out via an Efabless shuttle, just like OpenMPW shuttles sponsored by Google.
The difference between this and a ‘plain’ OpenMPW shuttle is that this can fit a ton of tiny/toy/demo designs, enabling a lot of people to get their toes wet with ASIC design without having to take up a ‘large’ shuttle spot.
https://skywater-pdk.readthedocs.io/en/main/
It was the commercial shuttles, called ChipIgnite, that have had space left over.
but i don’t think it really matters - there have been lots of submissions for all of them and a ton of cool stuff, and yeah the recent open shuttles are definitely full :)
If q3k's answer wasn't sufficient, maybe you can find more answers in the github repo that builds everything? https://github.com/mattvenn/wokwi-verilog-gds-test
Otherwise, there's a discord where the author (Matt) very active: https://discord.gg/rPK2nSjxy8
For example one could try to clone many of these: https://en.wikipedia.org/wiki/List_of_7400-series_integrated...
Another fun project idea. Make a 1bit processor slice. Then show how many slices can make a larger system. Similar to:
"Using LSI processor bit-slices to build a PDP-11—A case study in microcomputer design" https://dl.acm.org/doi/pdf/10.1145/1499402.1499444
From Googling, it sounds like the 74181 ALU chip was only ~75 gates or so https://en.wikipedia.org/wiki/74181. And the AM2901 something like ~500
Read the PDP/8 instruction sheet. Wow that's nice and minimal.
Not sure how to protect against replay, with only 200 gates...