AFAI recall, this was not a replacement for R-PI or similar desktop computing (IT systems). With constant fear of backdoor(s) in processors exploited by hackers and rogue state actors, there was genuine need for design / fabrication of processors for critical infrastructure (power systems, satellites/space and OT systems of importance (Not IT).)
Design philosophy : https://youtu.be/4EcqJ-bucV4?t=1476
"RISC-V has been chosen as the instruction set architecture (ISA) for the SHAKTI class of processors. The SHAKTI processor and systems design is developed using the open source high-level synthesis (HLS) language: Bluespec System Verilog (BSV)."
Yes, but where is the actual Verilog for the cores?
At least BlueSec doesn't seem to be a proprietary dialect: https://github.com/B-Lang-org/bsc (BSD License)
Great to hear that it can be used as a desktop replacement. I did my bachelors in Electrical Engineering in India almost 16 years ago. We went to GridCo for our industrial training sessions. The managing director was very interested in the subject of quality of electricity. The voltage fluctuates so much due to a variety of factors that it used to be almost impossible to provide reliable electricity for manufacturing chips. He was quite sad when told us about the story where Intel couldn't set up a fab in India and chose to go to Israel instead because of this very reason. Hopefully things have changed.
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"RISC-V has been chosen as the instruction set architecture (ISA) for the SHAKTI class of processors. The SHAKTI processor and systems design is developed using the open source high-level synthesis (HLS) language: Bluespec System Verilog (BSV)."
(Saying it's "just" RISC-V is like saying the Clang is the same as same as hello world because they're both in C++)