That’s NOT how it works. You can simulate it and state MIPS/MHz, for example. Do your really think that the first time silicon designers find out the performance of a chip they designed is when it tapes out?
You are correct that performance is “known” at design time.
That said, as this is a new platform a little healthy “believe when I see it” is warranted not just for the performance of this new chip but also about when it will ship and what it will be competing with by then.
I get the feeling that ARM and RISC platforms are going to screw around for so long that by the time you can buy a system with one in them Intel and AMD will have caught up on performance per watt and made them unneeded.
They mean in the markets that x86 is leading in, like desktop, mobile laptops, and server. The server market is particularly interesting as while ARM is gaining market share, it's mostly because Intel is losing market share because their products haven't been up to par in terms of performance per watt that AMD can provide.
They may not yet be dominant in those markets; but "by the time you can buy a system" is a bit of a stretch given you can walk out of a Apple store with a strong contender for the best Laptop or spin up the highest performance/$ EC2 A1 instances today.
For about 10 years after the introduction of microprocessors, legacy minicomputer platforms continued to sell on the high end. PCs were too small and slow and not enough IO. But the economy of scale made PC hardware incredibly cheap and it rapidly improved. They got bigger. Eventually, server-sized, competing with minicomputers, which did not have the backing of an architecture used at massive scale. Most servers ended up being based on up-scaled PC hardware, and the underlying architecture of servers (such as x86 processors) ended up reflecting that.
I think the same may happen with smartphones/TVs/tablets/etc. Billions of these devices are sold each year, compared to perhaps tens of millions of high-end desktops or servers.
I am guessing you are well aware of M1 and M2 laptops and Mac Minis. I would argue that the latter answers your question. While I am no expert on the space, I know that Microsoft has launched their own mini-like ARM PC. There must be others.
If you are thinking of a tower though, there may in fact not be any. That is more of a statement about this desktop market than the RISC one though.
I wouldn't say arm is screwing around, apple silicon is no joke. The thing is that the M1/M2/etc. cpus are incredibly good partly because of their raw cpu performance, but also because of the big/little design and the extra niceties (amx, etc.)
If you're going to add your own instructions anyways, then why go risc-v over arm?
But I can go out today and buy a computer with an ARM chip in it today, very easily.
Even for RISC, you can buy some boards but I assume those don’t count. But at a regular consumer level, there’s tons of ARM computers in use right now, even if they’re restricted to only a few companies who make them.
The icache is interesting. One of the high points of RISC-V is that it requires less work in the decode part of the frontend compared to competitors, which can be used to reduce pipeline stages. However, it has the disadvantage that it generally requires more code, both in amount of instructions and in bytes, to do the same work. This is bad both because it requires more throughput on the frontend and because it makes L1i cache efficiency worse.
This CPU solves this by making the instruction cache very large. This certainly requires more fetch stages in the pipeline to clock high, which is offset by the simpler decode, probably giving similar results to competitors.
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[ 2.6 ms ] story [ 49.4 ms ] threadYou are correct that performance is “known” at design time.
That said, as this is a new platform a little healthy “believe when I see it” is warranted not just for the performance of this new chip but also about when it will ship and what it will be competing with by then.
It looks very promising though.
https://www.nextplatform.com/2023/02/02/the-first-risc-v-sho...
Theoretical, or not.
Also the headline: The First RISC-V Shot Across The Datacenter Bow
/me morphs into Dark Fader and intones: I find your lack of enthusiasm disturbing… … …
I think the same may happen with smartphones/TVs/tablets/etc. Billions of these devices are sold each year, compared to perhaps tens of millions of high-end desktops or servers.
If you are thinking of a tower though, there may in fact not be any. That is more of a statement about this desktop market than the RISC one though.
https://cdn.statcdn.com/Statistic/270000/272595-blank-355.pn...
Plum forgot about the iMac.
If you're going to add your own instructions anyways, then why go risc-v over arm?
Their success with M1 and M2 aren't hugely generalisable.
Even for RISC, you can buy some boards but I assume those don’t count. But at a regular consumer level, there’s tons of ARM computers in use right now, even if they’re restricted to only a few companies who make them.
RISC-V I don't know about, but having fixed length instructions is theoretically safer.
This CPU solves this by making the instruction cache very large. This certainly requires more fetch stages in the pipeline to clock high, which is offset by the simpler decode, probably giving similar results to competitors.
RV64GC is the most dense 64bit architecture. This means it takes the least bytes of code to do a given task.