Nonw thats a good question, I'd love to see the Intel Management Engine circuitry and the AMD PSP circuitry, knowing its got an AMD cpu and AMD's give you infinite ways to return. https://news.ycombinator.com/item?id=34720416
Author here: this is about as far as I can go. When chips get more than 1 metal layer, I don't have a good way to examine them. Professional reverse-engineering firms can go a lot further.
The furthest I've seen publicly is the original Playstation ASICs. http://psxdev.ru/ [Russian Language]
Similar in time to the playstation ASICs (and similar design in sort of a soup of standard cells on a CMOS process), but at a gate count similar to Ken's fantastic work here on the 8086 is the work reversing the Gameboy SoC: https://github.com/furrtek/DMG-CPU-Inside
Chip manufacturers, professional chip reversers, and academic institutions have the tooling to take chips apart at varying levels of granularity all the way down to atom by atom if necessary.
I know my PC stack is built on decades of legacy cruft, but I had no idea how much cruft was already incubating in the heart of my CPU four decades ago:
The 8086 has some strange characteristics, such as acknowledging interrupts twice, but these features make more sense when looking at the 8086's history and what it inherited from the 8008 and 8080.
Looking at the 8086 in detail has given me much more appreciation for RISC. Every special case in the 8086 or random footnote corresponds to a block of extra logic. And there are a lot of them.
It makes some sense to me when you realize the 8080 was salvaging work they did attempting to win the Datapoint contract (which they lost), and making the best of a terrible design in the 8008 by being "source" compatible.
The "real" next gen processor was supposed to be iAPX 432 but due to delays they needed a stopgap, thus the 8086 was born in a hurry... so anything with high risk was off the table from the start. It was never going to get rid of segmented memory though believe it or not they added GP registers compared to the 8080.
Funny how iAPX 432 would not be the last time Intel tried to set a new standard for CPUs nor the last time they tried to rely on sufficiently clever compilers.
All of the above mentioned CPUs suffered from trying to be suitable for desktop calculators and/or prioritizing assembly language conveniences. iAPX 432 tried to partially implement garbage collection in hardware.
Even the venerable 286 and its broken protected mode was designed for industrial systems - Intel never intended it to be used in a general purpose PC which may explain some of its quirks.
I found it interesting that this processor uses microcode as an extra layer between the CPU and the instruction set architecture visible to programmers. This effectively allows a large portion of the control logic to be implemented in code rather than complex logic gates.
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[ 1.7 ms ] story [ 28.6 ms ] threadSimilar in time to the playstation ASICs (and similar design in sort of a soup of standard cells on a CMOS process), but at a gate count similar to Ken's fantastic work here on the 8086 is the work reversing the Gameboy SoC: https://github.com/furrtek/DMG-CPU-Inside
Chip manufacturers, professional chip reversers, and academic institutions have the tooling to take chips apart at varying levels of granularity all the way down to atom by atom if necessary.
The 8086 has some strange characteristics, such as acknowledging interrupts twice, but these features make more sense when looking at the 8086's history and what it inherited from the 8008 and 8080.
The "real" next gen processor was supposed to be iAPX 432 but due to delays they needed a stopgap, thus the 8086 was born in a hurry... so anything with high risk was off the table from the start. It was never going to get rid of segmented memory though believe it or not they added GP registers compared to the 8080.
Funny how iAPX 432 would not be the last time Intel tried to set a new standard for CPUs nor the last time they tried to rely on sufficiently clever compilers.
All of the above mentioned CPUs suffered from trying to be suitable for desktop calculators and/or prioritizing assembly language conveniences. iAPX 432 tried to partially implement garbage collection in hardware.
Even the venerable 286 and its broken protected mode was designed for industrial systems - Intel never intended it to be used in a general purpose PC which may explain some of its quirks.