> 2D materials are clearly the future of the industry, with a lot of momentum pushing the field forward.
You wonder about that statement. Costs will truly be out of control in future nodes. To the point where basically no one can afford the transition. Will we enter a world where higher performance is possible, but no one pursues on the account that silicon is "good enough?" This would be the equivalent of the abandonment of supersonic flight.
Alternatively, we may see a radical shift in how the semiconductor world works. Instead of everyone moving to the next node, we instead see a split market. There will be a market for those who can afford to pay millions of dollars for a very special kind of chip made with special transistors. And there will be market for normal people.
> There will be a market for those who can afford to pay millions of dollars for a very special kind of chip made with special transistors. And there will be market for normal people.
It is already like that, but it's not a binary choice. You pay $$$ to be on the "bleeding edge", or $$ for "previous gen", and if that's still too expensive, you can pay $ for "2 gens ago or older".
It used to be that you paid $ for the top process, or you could reuse your investment by paying $$ for the previous one. Anything older was cost prohibitive.
Those fabs are former cutting edge, but now fully accounting-deprecated, so they're used for MCUs. But I wonder what the steady state looks like? Nobody makes 180nm equipment now. Eventually they'll run out of spare parts. What do things look like in another 30 years? MCUs made at 14nm? How big would the die be on like an ATtiny4? Bond wires crowded around 100x100 µm of populated silicon? Dicing saw kerf throwing away half the wafer?
I wonder if there is a market for new fabs for old processes. Make them cheap, modular, easy to setup. Then use them for the embedded market. Maybe promise long lifetimes or multiple proceses to support legacy. Or force everyone on one process with huge supply.
Basically, the screws and washers of semiconductors.
After the ban by USA on export of some chips to China. China seems to have invested heavily in these mature nodes in the last 2-3 years not just the bleeding edge so it would be hard for non chinese companies to compete in mature nodes in the future. China was already investing in foundries but the US recent ban seem to have pushed them to invest a lot more and accelerated their ability.
Vishay does that right now in Itzehoe, Germany a few dozen miles north-west of Hamburg. 300mm wafers with large structures, but for MEMS , power ,and automotive, mostly. The site already does 200mm wafers, also MEMS, power and automotive.
There are other problems there like mixed signal work, higher voltages, etc. that make it hard to use the smaller nodes. Especially the FinFET ones for classic microcontroller uses.
And the bond wire problem you point out is also real; these designs will then become severely limited by core size and not the size of the padring. But the advantage will be, ridiculously high yields.
That’s why 28nm is such a sweet spot - you are still on bulk silicon, but the frequencies are great and the yield is massive for tiny chips.
True, but this trend could really accelerate. I imagine something akin to how ultra-performance cars are priced compared to regular cars, and this gap doesn’t close anywhere near as fast as it used to.
That's odd. From my perspective, an ideal transistor has zero temperature sensitivity across the linear range, zero voltage drop across the PN junctions, a beta cutoff frequency of infinity Hz, 0 ohm stray base resistance. Oh, and doesn't overheat.
That would be somewhat unfair towards MOSFETs and their quite versatile spectrum of applications though: MOSFETs are actually also being used for lots of linear applications. For high power linear stuff, they have to be designed slightly differently than cheaper MOSFETs designed solely for switching, so as to not run into ETI (electro-thermal instability) problems, but it's not uncommon. So, maybe "an ideal transistor for switching/digital purposes"?
> 2D materials are clearly the future of the industry, with a lot of momentum pushing the field forward.
I've been out of the semiconductor materials and devices game for a while, but I wouldn't be so sure. Just because these materials have a lot of papers about them, doesn't mean they're the future. They get a lot of papers written about them because they're relatively easy to study and because governments are funding research on 2D materials (though I can't really say why they receive so much funding. It's completely disproportional to their promise.)
Even if you could manufacture wafer scale 2D material transistors with high yield (which is a huge if), what does it buy you? Based on my, admittedly out of date, knowledge of 2D semiconductor devices, they're no panacea. Contact resistance is even more of a problem than it is for silicon at leading edge node scales. But even if it could match, or maybe even slightly beat the performance of silicon (another huge if), again, what does it buy you? One extra node, if you're lucky?
No, if my money had to be on a CMOS successor, it would be on nanoscale vacuum switches. Basically a vacuum tube scaled down to modern VLSI dimensions, at which atmospheric pressure is sufficiently low pressure to operate. Their biggest problems are 1) the lack of a complementary switch (so no CMOS equivalent, at least not without MEMS which doesn't scale), and 2) device longevity, which is likely solvable. These devices are far more manufacurable than 2D semiconductor material transistors. All of the process steps already exist, they can be stacked, unlike semiconductors, which must be single crystalline for good performance and therefore cannot be grown on insulators, device characteristics have a much higher ceiling thanks to the full vacuum barrier, and contact resistance is far less of a problem, because all of the junctions are between metals.
My second runner up would be room temperature superconductor switches, but we don't have that technology yet.
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[ 2.8 ms ] story [ 62.2 ms ] threadYou get hardware to work. Then try size/cost reducing the hardware, with software or error checking taking up the slack.
Then when you get good at it, make it cheaper and/or smaller and start the whole cycle over again.
You wonder about that statement. Costs will truly be out of control in future nodes. To the point where basically no one can afford the transition. Will we enter a world where higher performance is possible, but no one pursues on the account that silicon is "good enough?" This would be the equivalent of the abandonment of supersonic flight.
Alternatively, we may see a radical shift in how the semiconductor world works. Instead of everyone moving to the next node, we instead see a split market. There will be a market for those who can afford to pay millions of dollars for a very special kind of chip made with special transistors. And there will be market for normal people.
It is already like that, but it's not a binary choice. You pay $$$ to be on the "bleeding edge", or $$ for "previous gen", and if that's still too expensive, you can pay $ for "2 gens ago or older".
and if not binning helps. Slightly faulty memory chips/cpu cores/gpu units become the midrange or budget lines of a product in speed and/or capacity.
This was the real meaning of Moore's Law.
But yeah, it stopped some 5 or 6 generations ago.
For example, TI's cost optimized MSPM0 released this year (2023) is on the 65nm node, or like 2006 era.
A fair number of uC chips are 90nm, or 180nm as well.
So you got cost-effective solutions on like 15-nodes behind.
Basically, the screws and washers of semiconductors.
Not to mention, space and radiation hardening - lots of space stuff gets done at 180/130/90...
https://en.wikipedia.org/wiki/Vishay_Intertechnology
https://jobs.vishay.com/go/Itzehoe/5510701
Has been planned for a while, building started ca. 2 weeks ago.
And the bond wire problem you point out is also real; these designs will then become severely limited by core size and not the size of the padring. But the advantage will be, ridiculously high yields.
That’s why 28nm is such a sweet spot - you are still on bulk silicon, but the frequencies are great and the yield is massive for tiny chips.
That's odd. From my perspective, an ideal transistor has zero temperature sensitivity across the linear range, zero voltage drop across the PN junctions, a beta cutoff frequency of infinity Hz, 0 ohm stray base resistance. Oh, and doesn't overheat.
I think OP meant "An ideal MOSFET". :)
OP might be closer to "an ideal solid-state relay"
That would be somewhat unfair towards MOSFETs and their quite versatile spectrum of applications though: MOSFETs are actually also being used for lots of linear applications. For high power linear stuff, they have to be designed slightly differently than cheaper MOSFETs designed solely for switching, so as to not run into ETI (electro-thermal instability) problems, but it's not uncommon. So, maybe "an ideal transistor for switching/digital purposes"?
I've been out of the semiconductor materials and devices game for a while, but I wouldn't be so sure. Just because these materials have a lot of papers about them, doesn't mean they're the future. They get a lot of papers written about them because they're relatively easy to study and because governments are funding research on 2D materials (though I can't really say why they receive so much funding. It's completely disproportional to their promise.)
Even if you could manufacture wafer scale 2D material transistors with high yield (which is a huge if), what does it buy you? Based on my, admittedly out of date, knowledge of 2D semiconductor devices, they're no panacea. Contact resistance is even more of a problem than it is for silicon at leading edge node scales. But even if it could match, or maybe even slightly beat the performance of silicon (another huge if), again, what does it buy you? One extra node, if you're lucky?
No, if my money had to be on a CMOS successor, it would be on nanoscale vacuum switches. Basically a vacuum tube scaled down to modern VLSI dimensions, at which atmospheric pressure is sufficiently low pressure to operate. Their biggest problems are 1) the lack of a complementary switch (so no CMOS equivalent, at least not without MEMS which doesn't scale), and 2) device longevity, which is likely solvable. These devices are far more manufacurable than 2D semiconductor material transistors. All of the process steps already exist, they can be stacked, unlike semiconductors, which must be single crystalline for good performance and therefore cannot be grown on insulators, device characteristics have a much higher ceiling thanks to the full vacuum barrier, and contact resistance is far less of a problem, because all of the junctions are between metals.
My second runner up would be room temperature superconductor switches, but we don't have that technology yet.
Actually this might be a lot closer than we thought: https://arxiv.org/abs/2003.14321