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The interesting thing that I discovered within the last year is that AMD also sold a processor very similar to SPARC, the 29000 (AMD 29k).

This was a descendent of the Berkeley RISC, and it had register windows in what might be a more advanced design.

As far as I know, it was used in the AMD K5 x86 CPU as the backend behind an x86 translation layer.

https://en.wikipedia.org/wiki/AMD_Am29000

I worked on one of the first dual core processors when I was at C-Cube Microsystems way back in 2000. It was an SoC with two microSPARC cores. One core was a general purpose processor for system functions running VxWorks and the other core was an MPEG-2 encoder/decoder running bare metal.

There was no MMU and the direct mapped data caches were not coherent (data segments had to be padded to a cache line to avoid the processors overwriting each others memory).

The chip was designed by Les Kohn of i860 fame. Here's a pic of an engineering sample with a 2001 date code.

https://www.w6rz.net/domino.png

This series/podcast is fantastic. It is worth checking out if you enjoyed Hannibal's old articles on Ars Technica, but don't mind a more human touch to it.

Btw, someone should really write a spiritual sequel to "Inside the Machine: An Illustrated Introduction to Microprocessors and Computer Architecture"

I was saddened to find that the series numbering was in binary.
Still looking forward to the second edition of "Inside the Machine"...