> The possibility of America placing sanctions on RISC-V
this is why they must get their messaging right? I disagree, I think America is who is wrong and should focus on getting "right", but I hate how in this political times right is associated with republicanism. wtf
This seems more like confusion over the difference between an open ISA and an open chip design on the part of policymakers than confusion over the meaning of “open source”. Like perhaps they’re imagining some form of copyleft enforced by the ISA being open, even though it’s both liberally licensed and also nowhere near everything you need to make a chip.
Probably adding to the confusion in some circles is that past open hardware designs were basically the VERILOG files--an approach that tuned out not to be very useful from a collaboration perspective. The analogs between hardware and software are not exact.
I'm not sure what you mean; people collaborate on Verilog files all the time. Some licensed or reverse-engineered designs are expressed in an ugly form of Verilog (much like decompiled or minified code), but that's not generally how it was originally written.
I don't think they're confused; I think they're worried about a robust RISC-V ecosystem weakening the ability of the US and its allies to influence the availability of processor technology by regulating licensing deals with the architecture "owners" like Intel, IBM, and ARM. From that perspective, the fact that open-source implementations are even allowed represents a potential threat (although I assume it's not long before ARMv7 runs out of essential patents, if it hasn't already).
> I don't think they're confused; I think they're worried about a robust RISC-V ecosystem weakening the ability of the US and its allies to influence the availability of processor technology by regulating licensing deals with the architecture "owners" like Intel, IBM, and ARM.
I mean, this seems pretty questionable? There's nothing stopping them from regulating licensing deals with smaller companies.
US' grip on advanced cpu tech is weakening anyway. Long-term, RISC-V is bound to take a hefty bite out of x86 & ARM market share no matter what.
Highest-performance AI accelerators (like Nvidia's latest), IP for high(est)-performing cores, and machines to manufacture those on the most advanced semiconductor nodes (see: ASML) is where it's at.
Given that, fuzzing over ISAs is mostly pointless noise imho.
Obviously people should be made aware that RISC-V is just a specification, and people all around the world already have it including China. Next up is the fact that the US seems to want to keep China behind on capability, so the existing bans on sending advanced lithography equipment to China already prevent them from making the most advanced processors - RISC-V or otherwise. That just leaves the possibility of China importing advanced processors from outside the country. For that it might be sensible to ban RISC-V physical hardware above some capability level from being sent there - just like AMD and nVidia aren't allowed to sell their best GPUs to China. That's really the only option that would hinder them in any way. Do we already have a GFLOPS limit on what can be sold to the Chinese? If so, the whole discussion is redundant.
I understand where folks have the possibility of confusion, how in explaining the value proposition of RISC-V that it would also get explained in terms of Open Source.
RISC-V is an Open Source Open Specification for an ISA that anyone is free to implement however they see fit. RISC-V is Open Source in its model of participation. It is not only free as in beer, but also free in terms of participation.
The USG can prohibit the movement of physical things, but it should not be partaking in the prohibition of the formation or movement of ideas.
How deep does the export restrictions rabbit hole go? It makes sense that they can restrict specific proprietary designs from being licensed to Chinese companies. If you want to keep your technology a secret so you can demand a licensing fee, then obviously the government can step in and just cancel those specific licensing deals.
But open standards and designs seem a bit more iffy to restrict, at least practically. I imagine the US government can at least notionally say, "sure, you granted a blanket irrevocable license under GPL/CC/whatever, but we're just going to retroactively tack on 'except China' to the license text", as weirdly unconstitutional[0] as that feels. But what does that actually do?
The specifications are public. There's open implementations. Anyone can download and rehost them. Are we going to declare ISAs and chip designs 'born secrets[1]' and just ban open hardware? Or do we do something sillier and, say, compel RISC-V to prosecute a legal case against (insert Chinese entities here) for infringing patents and IC design rights[2] that they had already freely licensed?
[0] Look, if bribery is legal because money is speech, then I don't see why code shouldn't be speech either. And if code is speech then I should be able to shout it to Huawei's face.
[2] In the US, you cannot copyright a chip design, there's instead a separate rights regime for IC designs. TBH they should have done the same thing with software a decade earlier.
Ultimately the hard work of clarifying the messaging seems pointless.
Putting export restrictions on RISC-V is pointless if you're already sanctioning Chinese chips. RISC-V is only useful as an interchange format. I write code, you make a chip, hey, the code runs! If I can't import your chip, why would you even bother using the interchange format? Just make your own ISA (which is actually very easy, as people here on HN are aware).
Making your own ISA that works is easy. Making a GOOD one is hard -- most of the ones engineers in some company just made up on the spot (because they needed a small CPU but didn't want to pay Arm or Cadence or Synopsys for one) are awful.
A prime example is FTDI's Vinculum-II (VNC2), which presumably was invisibly used internally in their chips, but then they made a chip designed to be customer-programmed. It is just AWFUL. You can debate whether RISC-V is better or worse than ARMv7 or ARMv8-A but at least it's close. VNX2 is not.
Getting all the world's software (or even just GCC, LLVM, Linux) ported to your ISA is the hardest of all.
A point often not noted is that RISC-V is very easy to emulate in software, whether interpretively or JIT, with minimal slowdown compared to native code. Not having condition codes and PC not being a GPR are major advantages here. This makes it also useful in WASM / JVM / CIL territory.
Because instructions that change the PC have to be handled specially because if not correctly predicted taken/not taken, and the target address) then they cause a pipeline break, throwing away speculatively executed work etc.
When the PC is a GPR then any instruction (with PC as the destination) can be a jump to different code. Even a subtract, for example.
In fact I have many times written `sub pc,pc,#3` to switch an Arm CPU to running the next instruction in Thumb mode.
Can you elaborate on what makes an ISA good or bad? And how much it really matters? Most high-end consumers and high-end servers are still using x86-64 CPUs, and that isn't even RISC.
The fastest off the shelf RISC-V machine currently is the Milk-V Pioneer using the SG2042 SoC which has 64 C910 OoO cores running at 2.0 GHz, with 64 MB L3 cache and up to 128 GB RAM. The core, SoC, board, and PC are all made in China.
Of course this situation changes very fast. There will be several machines using SiFive's P550 cores in several months -- most from Chinese companies, or at least using Chinese SoC (SiFive's own HiFive Premier P550 board). And then at the end of the year the Milk-V "Oasis" (and others from at least Sipeed) using SiFive's P670 cores, but again in the Chinese SG2380 SoC.
There are a several US startups who started work on RISC-V core in 2021-2022 who will have much faster (Apple M1 class or better) cores, but those won't arrive in machines you can buy until 2025 or 2026.
I explicitly limited myself to things you can buy off the shelf RIGHT NOW, today, June 2024.
Of course the RISC-V situation is changing very quickly. By around year end we'll have SoCs with cores 2-3x faster than today (2x in IPC and also higher clock speed). And more big surges in 2025 and 2026 as things such as Ascalon and Veyron and others hit the market in mass production.
and ... who cares if it is open-source or and open-standard?
the same problem would occur if you tied to "sanction" some other open-source because china! oh, for example linux.
freedom, as in speech, is a double-edged sword. the bag, as it were, cannot be put back in the cat. what helps us, helps china. and what hurts china hurts us as well, maybe even worse.
it's no different than the physics that preceded the development of atomic bombs. the papers, the theories were public or semi-public all the way into the 1930s. germany actually helped the effort by banishing some scientists and by funding others. and then both groups collaborated internationally. once a weapon was postulated, and war was afoot, everyone made it top-secret. but the fundamentals were widely known by then.
it wasn't keeping secrets that won the race. it was the equivalent of spending the equivalent of 27 Billon dollars first that won the race.
so if you want to beat china in RISC-V, spend the money to develop it first, faster, better. throw 27 Billion into the development and do it faster and better than your adversaries. it 's a fair contest, so you better get to it.
ISAs are not the hardware as the hardware is made up of Instruction Decoders and a micro-op engine and other parts that's implemented in the hardware and that is someone's bespoke design that's engineered to execute that ISA. So ISAs are just execution templates that are created to implement a standard execution model and standard encodings with rules that are to be followed by whoever has designed the hardware to execute that ISA(Standard).
The RISC-V ISA is just another standard with a multitude of different ways, in hardware, for someone to implement that ISA. The RISC-V ISA is only special in that it's License Free to use that RISC-V ISA and so no money has to change hands or no royalties have to get paid to utilize the RISC-V ISA/standard. And the RISC-V ISA has no limitations on any set/subset of Instructions that the end user must implement and so that's popular for making Micro-controllers that are never going to be used for any general purpose computing anyways.
There needs to be some Legal definition of just where the ISA ends and the Micro-Architecture begins as that's the de-marking line there as to where the Standard ends and someone's hardware implementation begins. Because on Modern Micro-Processors the ISA instructions/encodings get broken down into Micro-Ops and it's the Micro-ops that are actually what the micro-op engines are executing to get that work done.
I'm sure ARM Holdings does not like RISC-V as that's not good for their ISA Licensing business model but RISC-V is not going to be easily stopped as how easy is it to realistically stop some standardized way of doing things. The only thing that can get restricted is the actual hardware implementations that are engineered to execute the RISC-V ISA if those are created in the US/EU/"West" but that's never going to stop anyone from creating their own bespoke hardware that implements the RISC-V ISA Standard. Impossible to do that for any ISA that's implemented for internal use only.
31 comments
[ 2.8 ms ] story [ 74.4 ms ] threadthis is why they must get their messaging right? I disagree, I think America is who is wrong and should focus on getting "right", but I hate how in this political times right is associated with republicanism. wtf
I mean, this seems pretty questionable? There's nothing stopping them from regulating licensing deals with smaller companies.
Highest-performance AI accelerators (like Nvidia's latest), IP for high(est)-performing cores, and machines to manufacture those on the most advanced semiconductor nodes (see: ASML) is where it's at.
Given that, fuzzing over ISAs is mostly pointless noise imho.
RISC-V is an Open Source Open Specification for an ISA that anyone is free to implement however they see fit. RISC-V is Open Source in its model of participation. It is not only free as in beer, but also free in terms of participation.
The USG can prohibit the movement of physical things, but it should not be partaking in the prohibition of the formation or movement of ideas.
But open standards and designs seem a bit more iffy to restrict, at least practically. I imagine the US government can at least notionally say, "sure, you granted a blanket irrevocable license under GPL/CC/whatever, but we're just going to retroactively tack on 'except China' to the license text", as weirdly unconstitutional[0] as that feels. But what does that actually do?
The specifications are public. There's open implementations. Anyone can download and rehost them. Are we going to declare ISAs and chip designs 'born secrets[1]' and just ban open hardware? Or do we do something sillier and, say, compel RISC-V to prosecute a legal case against (insert Chinese entities here) for infringing patents and IC design rights[2] that they had already freely licensed?
[0] Look, if bribery is legal because money is speech, then I don't see why code shouldn't be speech either. And if code is speech then I should be able to shout it to Huawei's face.
[1] Ala thermonuclear weapon designs. If you really want a pit in your stomach about the legal foundations of the US, read https://en.wikipedia.org/wiki/United_States_v._Progressive,_....
[2] In the US, you cannot copyright a chip design, there's instead a separate rights regime for IC designs. TBH they should have done the same thing with software a decade earlier.
Putting export restrictions on RISC-V is pointless if you're already sanctioning Chinese chips. RISC-V is only useful as an interchange format. I write code, you make a chip, hey, the code runs! If I can't import your chip, why would you even bother using the interchange format? Just make your own ISA (which is actually very easy, as people here on HN are aware).
A prime example is FTDI's Vinculum-II (VNC2), which presumably was invisibly used internally in their chips, but then they made a chip designed to be customer-programmed. It is just AWFUL. You can debate whether RISC-V is better or worse than ARMv7 or ARMv8-A but at least it's close. VNX2 is not.
Getting all the world's software (or even just GCC, LLVM, Linux) ported to your ISA is the hardest of all.
A point often not noted is that RISC-V is very easy to emulate in software, whether interpretively or JIT, with minimal slowdown compared to native code. Not having condition codes and PC not being a GPR are major advantages here. This makes it also useful in WASM / JVM / CIL territory.
What's GPR?
When the PC is a GPR then any instruction (with PC as the destination) can be a jump to different code. Even a subtract, for example.
In fact I have many times written `sub pc,pc,#3` to switch an Arm CPU to running the next instruction in Thumb mode.
Gross.
1) Chinese
2) actually Open Source (except the vector unit): https://github.com/T-head-Semi/openc910
The fastest off the shelf RISC-V machine currently is the Milk-V Pioneer using the SG2042 SoC which has 64 C910 OoO cores running at 2.0 GHz, with 64 MB L3 cache and up to 128 GB RAM. The core, SoC, board, and PC are all made in China.
Of course this situation changes very fast. There will be several machines using SiFive's P550 cores in several months -- most from Chinese companies, or at least using Chinese SoC (SiFive's own HiFive Premier P550 board). And then at the end of the year the Milk-V "Oasis" (and others from at least Sipeed) using SiFive's P670 cores, but again in the Chinese SG2380 SoC.
There are a several US startups who started work on RISC-V core in 2021-2022 who will have much faster (Apple M1 class or better) cores, but those won't arrive in machines you can buy until 2025 or 2026.
I explicitly limited myself to things you can buy off the shelf RIGHT NOW, today, June 2024.
Of course the RISC-V situation is changing very quickly. By around year end we'll have SoCs with cores 2-3x faster than today (2x in IPC and also higher clock speed). And more big surges in 2025 and 2026 as things such as Ascalon and Veyron and others hit the market in mass production.
"RISC-V is clearly a threat to national security and (purely coincidentally, of course) to ARM's licensing business."
the same problem would occur if you tied to "sanction" some other open-source because china! oh, for example linux.
freedom, as in speech, is a double-edged sword. the bag, as it were, cannot be put back in the cat. what helps us, helps china. and what hurts china hurts us as well, maybe even worse.
it's no different than the physics that preceded the development of atomic bombs. the papers, the theories were public or semi-public all the way into the 1930s. germany actually helped the effort by banishing some scientists and by funding others. and then both groups collaborated internationally. once a weapon was postulated, and war was afoot, everyone made it top-secret. but the fundamentals were widely known by then.
it wasn't keeping secrets that won the race. it was the equivalent of spending the equivalent of 27 Billon dollars first that won the race.
so if you want to beat china in RISC-V, spend the money to develop it first, faster, better. throw 27 Billion into the development and do it faster and better than your adversaries. it 's a fair contest, so you better get to it.
The RISC-V ISA is just another standard with a multitude of different ways, in hardware, for someone to implement that ISA. The RISC-V ISA is only special in that it's License Free to use that RISC-V ISA and so no money has to change hands or no royalties have to get paid to utilize the RISC-V ISA/standard. And the RISC-V ISA has no limitations on any set/subset of Instructions that the end user must implement and so that's popular for making Micro-controllers that are never going to be used for any general purpose computing anyways.
There needs to be some Legal definition of just where the ISA ends and the Micro-Architecture begins as that's the de-marking line there as to where the Standard ends and someone's hardware implementation begins. Because on Modern Micro-Processors the ISA instructions/encodings get broken down into Micro-Ops and it's the Micro-ops that are actually what the micro-op engines are executing to get that work done.
I'm sure ARM Holdings does not like RISC-V as that's not good for their ISA Licensing business model but RISC-V is not going to be easily stopped as how easy is it to realistically stop some standardized way of doing things. The only thing that can get restricted is the actual hardware implementations that are engineered to execute the RISC-V ISA if those are created in the US/EU/"West" but that's never going to stop anyone from creating their own bespoke hardware that implements the RISC-V ISA Standard. Impossible to do that for any ISA that's implemented for internal use only.