Now that we have TinyTapeout, and the design and development of small custom chips is within the grasp of almost anyone, what new directions do you think chip design will take?
I'm interested in the collection of small cooperating chips on a common fabric approach. Essentially the chiplet work being done by AMD, which seems to have some options for third party silicon running on the same fabric.
I suspect, but do not know for sure, that verilog is going to emerge as the root cause for a wide variety of cost and error problems in silicon design. I'm therefore interested in non-verilog approaches to describing chips, but only at the casual / hobby level for now.
It turns out that TinyTapeout doesn't gate the power to the digital submissions, so they need the GDS to be auto-generated to not take down the whole chip.
If you want to route things yourself, I suppose you could use their new analog pin support, for which they gate power to keep the rest of the chip safe.
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[ 2.3 ms ] story [ 15.6 ms ] threadI suspect, but do not know for sure, that verilog is going to emerge as the root cause for a wide variety of cost and error problems in silicon design. I'm therefore interested in non-verilog approaches to describing chips, but only at the casual / hobby level for now.
If you want to route things yourself, I suppose you could use their new analog pin support, for which they gate power to keep the rest of the chip safe.