RISC-V is fully trap-and-emulate-able and so you can even do this without the virtualization extension! Though page table walks and the like will be done in hardware and thus will be very slow.
Tangentially related: can anyone here recommend some good resources (preferably even books) on hypervisors? Back in university we got a brief introduction into the topic but I was always interested in learning about it more in depth.
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[ 3.5 ms ] story [ 27.1 ms ] threadFor Aarch64, Arm's official guide is pretty good https://developer.arm.com/documentation/102142/latest/