Having 1.5V Vpp ripple on a 3.3V supply rail seems more like an issue with the regulator / bulk capacitance than a decoupling capacitor, I would think?
This signifies that each vertical dotted line is 20ns apart, so the ripple you see has a frequency of something like 50MHz.
Unless you have a 50MHz buck converter (which would be very exotic --- the fastest common ones are around 1/10th that), that looks more like something may be inadvertently oscillating and/or you're picking up strong RF noise from possibly something in...
It's not oscillating at 50MHz. Look at the waveform, with the big spike in the middle. That's a spike at some lower frequency, wider than the screen, followed by ringing. Need to zoom out the time base some more to see the period of the big spikes. It's no higher than 4 MHZ (the screen is 12 units wide) and possibly much lower. (Assuming that M:20ns on the display means 20ns/grid division. The manual is a bit hazy on that part of the UI.)[1]
The power regulator IC mentioned is normally run at 500KHz. There's a reasonable chance that this is the power regulator spike not being damped out. Easy enough to check with a scope handy.
Ah how things have changed. When I was learning electronics we mainly dealt with radio and TV circuits and just about the first lesson one learned was to keep leads short (reduce unwanted inductance) and use decoupling capacitors everywhere.
I recall some years later a young graduate engineer coming into my office with a rather involved circuit consisting of 30/40 TTL ICs and complaining that he'd double checked the circuit and it still didn't work. I took one look at his device then went to the draws of capacitors and handed him a handful of 0.1uF ceramic caps and told him to put them between the ICs' PS rail pins to ground which he did and to his amazement the circuit worked immediately.
He stood in amazement that I should have such insight so as to fix the problem at first glance.
How such critical knowledge can get lost in university training these days just amazes me.
I can see how that happens when people come at things from a conceptual digital side first.
It probably doesn't help when you have a circuit diagram that while topologically correct doesn't show the relative positioning between components. The first time I saw all the decoupling caps rendered in a single chain on the side of the diagram I was mightily confused. It seemed like utter nonsense until I realised where they actually went.
This is utter nonsense. Just ask the layouter where they will be placed. (at the output of the voltage regulator or where he will find empty space on the board, completely missing their function).
Where your schematics is bad, the layout will be also bad.
You learned when analogue circuitry was the norm. I learned when digital circuitry was simple enough that you could readily take something apart and understand it.
Now, EE courses often start with cad, simulations, digital electronics, and you end up with people building ziggurats atop an ocean of incomprehension.
It’s exactly the same thing with software.
I don’t scorn people for this, rather I see myself as fortunate for having learned in a time when the more fundamental knowledge was still worth learning - and that’s the rub - for a vast majority, it simply isn’t worth the time or energy to explore the full stack, when there’s so much to learn atop it.
> How such critical knowledge can get lost in university training these days just amazes me.
It will probably have been taught.... but very briefly. Before going go back to analysing circuit schematics, where connections between components don't show resistance or inductance, and the capacitance of two parallel capacitors sums.
My university made us use really crappy power supplies and dev boards. Nothing worked unless you first put a large bulk capacitor on the power supply's output, and small capacitors close to the components.
Also I got bitten by parasitics in capacitors very early in my career: capacitors of different face value will resonate with each other to effectively kill the decoupling network at a specific frequency (resulting, for me, in an amplifier with a nice hole in its frequency response).
I have an MSEE from a top university (from 20 years ago), this topic unfortunately is not really taught. The theory and analysis is taught, but the practical implications were not. I connected the dots in my first job out of school where some very talented gray beards taught me how the real world works. Which brings me to my point that EE really is a trade. It takes schooling at the beginning and in most cases a degree or two, but there is critical knowledge that you learn in the real world after school; and there are levels analogous to apprentice, journey man, and master.
I've struggled to find a proper introductory guide to stuff like this. Moving from pre-made Adafruit boards to my own PCBs was very tough to navigate; every guide I came across assumed you knew all sorts of stuff that the EEs writing them probably committed to deep memory decades earlier.
This is probably a good place to debunk the usual wisdom that "decoupling capacitors must be placed very close to the IC pins". If you're using a solid power plane, rather than routing power through traces (and honestly 4/6 layer boards are cheap enough these days) it really doesn't matter where you place decoupling capacitors for most uses - keep the via traces short or ideally in the pad, and you can put all your decoupling capacitors in one place on the boards a way away from the chip and focus on good routing of your signals. Figure 15 on this paper (and the whole paper!) explains it well: https://scholarsmine.mst.edu/cgi/viewcontent.cgi?article=221...
Loop inductance is what really matters with decoupling. Once you understand that, it becomes really easy to make good decisions. This article explains how you can approximate the inductance for a given layout, so it makes evaluating layouts much simpler. It actually used the data from the paper you referenced in example 3!
As you say, just having power planes and directly connecting to them is almost always going to be superior to using a trace, despite seeing this all the time, especially in datasheet example layouts. It made sense for 2 layer boards, but not today. Just think, the inductance of the planes is practically zero, and distance to the plane from the components is going to be on the order of 0.2mm, round trip 0.4mm. Is there any way I could place the capacitor 0.4mm away from the pins to achieve an equivalent inductance? And even if you could, you can't add extra vias to lower inductance, and you don't benefit from mutual inductance.
Well, till it does. Paper talks about frequencies in 200MHz range, not every project can afford solid power planes and putting it next to a chip costs literally nothing. It's like safety helmet, 99.9% of the time it's not needed
If getting a cap on the input of the magnetometer is too challenging, a ferrite bead on the output of the caps fed by the switching supply might also do the trick.
You could also try just sticking a 100n and 10n across the smps output too.
leared = learned ?
The O'Reilly book "Designing Embedded Systems" covers this pretty well with a story very similar to yours.
Great to be able to learn something new.
To makers that want to play and learn with power converters I recommend you:
- Test the converter at various points of load (when prototiping keep some 0ohm resistor/jumper for attaching a resistor load or electronic load).
- When you have to measure things, look around app notes/white papers of manufacturers, you will usually find practical actionable info and some examples. Doing proper measurements is really a discipline of its own, but for low frequency you can get far with the basics of craftsman/rule of thumb engineering. [0] [1]
For example the author here in the videos is mostly measuring the inductance loop between the positive of the rail and wherever ground is (we cannot even see where the osc negative is??) and how this particular loop responds to a cap, not the real bus.
Slightly related note, the pictures in the articles show a handheld digital oscillscope. It's an Owon HDS200 series oscilloscope with signal generator and they are amazing and the lower frequency models are quite inexpensive.
I got myself one earlier this year and it does what it says on the tin. It can also be controlled from a computer via USB serial connection using a text based protocol (albeit poorly documented and a bit buggy). I used some python scripts to program the signal generator and then capture some measurements from the scope to check the frequency responses of some analog electronics circuits for guitar.
There is a small community around, there are a few repos on GitHub for using them and also this very long eevblog thred.
I think the author's analysis of the problem is off. He writes about ripple from the regulator:
> This switching causes ripples in the voltage line,
But what is on the scope is not that ripple:
> Take another look at the pictures of the ripples above and notice the “M: 20ns” in the top left corner. This signifies that each vertical dotted line is 20ns apart, so the ripple you see has a frequency of something like 50MHz.
The switching regulator does not operate anywhere near 50 Mhz. Those voltage fluctuations are caused by the magnetometer itself: its own internal switching causing rapid current demand fluctuations. Or, possibly, it could be some other nearby device, in which case that device needs the decoupler (also).
This is why the decoupling capacitor addresses the problem. The purpose of the decoupling capacitor isn't to filter power supply ripple, but to provide a local, low-impedance current source that can swallow changes in current demand. That's why it's placed close to the device. It not only ensures that the device has smooth power, but also reduces the noise that it generates, protecting other devices.
I don't think you're entirely correct here. The regulator will create noise that has a fundamental frequency of 500 kHz. That we agree on. However, this 50 MHz noise can most certainly be caused by the regulator. It's critical to note that it's not a constant 50 MHz noise. It's clearly attenuating quickly and occurring sharply. If the author had zoomed out to the 500 kHz time scale, I'd bet we'd see this noise every time the switches change.
30 comments
[ 1.8 ms ] story [ 58.2 ms ] threadUnless you have a 50MHz buck converter (which would be very exotic --- the fastest common ones are around 1/10th that), that looks more like something may be inadvertently oscillating and/or you're picking up strong RF noise from possibly something in...
https://en.wikipedia.org/wiki/6-meter_band#Radio_control_hob...
And "leared" -- the (unintentional?) pun made me click.
The power regulator IC mentioned is normally run at 500KHz. There's a reasonable chance that this is the power regulator spike not being damped out. Easy enough to check with a scope handy.
[1] https://fotronic.asset.akeneo.cloud/pdfs/media/owon_hds242s_...
I recall some years later a young graduate engineer coming into my office with a rather involved circuit consisting of 30/40 TTL ICs and complaining that he'd double checked the circuit and it still didn't work. I took one look at his device then went to the draws of capacitors and handed him a handful of 0.1uF ceramic caps and told him to put them between the ICs' PS rail pins to ground which he did and to his amazement the circuit worked immediately.
He stood in amazement that I should have such insight so as to fix the problem at first glance.
How such critical knowledge can get lost in university training these days just amazes me.
It probably doesn't help when you have a circuit diagram that while topologically correct doesn't show the relative positioning between components. The first time I saw all the decoupling caps rendered in a single chain on the side of the diagram I was mightily confused. It seemed like utter nonsense until I realised where they actually went.
This is utter nonsense. Just ask the layouter where they will be placed. (at the output of the voltage regulator or where he will find empty space on the board, completely missing their function). Where your schematics is bad, the layout will be also bad.
You learned when analogue circuitry was the norm. I learned when digital circuitry was simple enough that you could readily take something apart and understand it.
Now, EE courses often start with cad, simulations, digital electronics, and you end up with people building ziggurats atop an ocean of incomprehension.
It’s exactly the same thing with software.
I don’t scorn people for this, rather I see myself as fortunate for having learned in a time when the more fundamental knowledge was still worth learning - and that’s the rub - for a vast majority, it simply isn’t worth the time or energy to explore the full stack, when there’s so much to learn atop it.
It will probably have been taught.... but very briefly. Before going go back to analysing circuit schematics, where connections between components don't show resistance or inductance, and the capacitance of two parallel capacitors sums.
Also I got bitten by parasitics in capacitors very early in my career: capacitors of different face value will resonate with each other to effectively kill the decoupling network at a specific frequency (resulting, for me, in an amplifier with a nice hole in its frequency response).
https://learnemc.com/estimating-connection-inductance
You can even use mutual inductance of vias improve performance, either by having vias spaced close together and in the right order (https://learnemc.com/decoupling-for-boards-with-widely-space...), or arranging capacitors in alternating or doublet layouts (https://incompliancemag.com/decoupling-capacitor-design-on-p...).
As you say, just having power planes and directly connecting to them is almost always going to be superior to using a trace, despite seeing this all the time, especially in datasheet example layouts. It made sense for 2 layer boards, but not today. Just think, the inductance of the planes is practically zero, and distance to the plane from the components is going to be on the order of 0.2mm, round trip 0.4mm. Is there any way I could place the capacitor 0.4mm away from the pins to achieve an equivalent inductance? And even if you could, you can't add extra vias to lower inductance, and you don't benefit from mutual inductance.
You could also try just sticking a 100n and 10n across the smps output too.
Another lesson waiting in the wings from mounting a magnetometer in plane and right next to four BLCD motors, lmao.
- Test the converter at various points of load (when prototiping keep some 0ohm resistor/jumper for attaching a resistor load or electronic load).
- When you have to measure things, look around app notes/white papers of manufacturers, you will usually find practical actionable info and some examples. Doing proper measurements is really a discipline of its own, but for low frequency you can get far with the basics of craftsman/rule of thumb engineering. [0] [1]
For example the author here in the videos is mostly measuring the inductance loop between the positive of the rail and wherever ground is (we cannot even see where the osc negative is??) and how this particular loop responds to a cap, not the real bus.
[0] https://www.analog.com/en/resources/app-notes/an-1144.html
[1] https://www.richtek.com/Design%20Support/Technical%20Documen...
I got myself one earlier this year and it does what it says on the tin. It can also be controlled from a computer via USB serial connection using a text based protocol (albeit poorly documented and a bit buggy). I used some python scripts to program the signal generator and then capture some measurements from the scope to check the frequency responses of some analog electronics circuits for guitar.
There is a small community around, there are a few repos on GitHub for using them and also this very long eevblog thred.
https://www.eevblog.com/forum/testgear/owon-hds-200-handheld...
> This switching causes ripples in the voltage line,
But what is on the scope is not that ripple:
> Take another look at the pictures of the ripples above and notice the “M: 20ns” in the top left corner. This signifies that each vertical dotted line is 20ns apart, so the ripple you see has a frequency of something like 50MHz.
The switching regulator does not operate anywhere near 50 Mhz. Those voltage fluctuations are caused by the magnetometer itself: its own internal switching causing rapid current demand fluctuations. Or, possibly, it could be some other nearby device, in which case that device needs the decoupler (also).
This is why the decoupling capacitor addresses the problem. The purpose of the decoupling capacitor isn't to filter power supply ripple, but to provide a local, low-impedance current source that can swallow changes in current demand. That's why it's placed close to the device. It not only ensures that the device has smooth power, but also reduces the noise that it generates, protecting other devices.