…except this Zync FPGAs, it has a processors in it.
I've never understood why the Zync CPU has to communicate with the rest of the FPGA over external busses. Why not connect a set of latches or LUTs to the instruction decoder and data bus, so you can create custom instructions?
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[ 0.20 ms ] story [ 15.2 ms ] threadI've never understood why the Zync CPU has to communicate with the rest of the FPGA over external busses. Why not connect a set of latches or LUTs to the instruction decoder and data bus, so you can create custom instructions?