…except this Zync FPGAs, it has a processors in it.
I've never understood why the Zync CPU has to communicate with the rest of the FPGA over external busses. Why not connect a set of latches or LUTs to the instruction decoder and data bus, so you can create custom instructions?
1 comment
[ 3.0 ms ] story [ 14.0 ms ] threadI've never understood why the Zync CPU has to communicate with the rest of the FPGA over external busses. Why not connect a set of latches or LUTs to the instruction decoder and data bus, so you can create custom instructions?