It's hard to guess how many, how complex, and how fast 4nm cores are going to be. However, (45nm / 4nm)^ 2 * 4mb of L3 cache ~= 500MB of L3/4? cache. Which is just awsome.
One outcome that is highly likely is that the processors will be highly integrated, with the whole system on a chip: CPU, GPU, memory controller, network/storage/pci/usb/etc controllers.
I could see integrating crappy onboard graphics cards with a small slice of the CPU, but integrating a full modern GPU would be hard. The issue is memory bandwidth. A 285 GTX has 159 GB/sec of memory bandwidth and 1GB of ram. For 250$ you can get 4GB of DDR3-1600 but that's only 38GB/s. So, if you want good preformance and low cost you need to seperate the video memory from system memory. But, now you have two set's of memory that each need to be close to the CPU/GPU for latency issues.
So, 2022's high quality cellphones, laptop's, and desktops are probably still going to use CPU, RAM, GPU, VRAM. But, I can see them mixing at the low end.
Cache would need to grow to something like 200x its current size to act as graphics memory today. So the need for more graphics memory would have to be far slower than Moore’s law for a long time for that to happen.
PS: Don't forget 3D graphics cards are still far too slow. You really can tell the difference between images generated with 1000x the processing power of today’s graphics card vs. 100x more powerful. Sound and 2D graphics cards passed that threshold where people stopped noticing more processing power so they became integrated.
Probably. People used to talk about running into quantum mechanics at about the current node, but that was due to tunneling across the gate oxide layer. This is being solved with new high-k dielectric materials. There's probably a whole lot more problems to be solved between now and 4 nm, though.
4 nm is really small. The silicon-silicon lattice spacing is 0.235 nm, so we're really only talking about a few atomic layers. I have no idea how they're going to build 'em that small, and I suspect that Intel's not really sure either.
The consensus seems to be that it's going to be difficult to scale traditional CMOS devices below the 22nm node. At those dimensions, you can't dissipate the heat produced by electrons tunneling through the gate dielectric. Beyond 22nm, it will probably be necessary to use novel gate designs, multiple gates, or start stacking multiple layers of traditional CMOS devices atop one another. There are a lot of ideas right now, but no one knows exactly where the industry will go yet once CMOS is played out.
If you want to see where semiconductors are going, the best place to start is the International Technology Roadmap for Semiconductors, (http://www.itrs.net/) which the industry compiles every couple of years to help coordinate R&D.
One big problem with having gates that small is the massive electron leak. Energy flows between the gates even when their off, so the power efficiency goes way down.
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[ 4.0 ms ] story [ 32.2 ms ] threadSo, 2022's high quality cellphones, laptop's, and desktops are probably still going to use CPU, RAM, GPU, VRAM. But, I can see them mixing at the low end.
PS: Don't forget 3D graphics cards are still far too slow. You really can tell the difference between images generated with 1000x the processing power of today’s graphics card vs. 100x more powerful. Sound and 2D graphics cards passed that threshold where people stopped noticing more processing power so they became integrated.
Is it physically possible to reach 4 nm with current computer architecture?
4 nm is really small. The silicon-silicon lattice spacing is 0.235 nm, so we're really only talking about a few atomic layers. I have no idea how they're going to build 'em that small, and I suspect that Intel's not really sure either.
If you want to see where semiconductors are going, the best place to start is the International Technology Roadmap for Semiconductors, (http://www.itrs.net/) which the industry compiles every couple of years to help coordinate R&D.