The link doesn't really give very much information, but from the tutorial (https://embeddedmicro.com/tutorials/lucid) it looks like a skin of Verilog. What's the advantage of using this over a more modern HDL like Chisel?
Yeah, it seems like just some syntax sugars for Verilog, not a whole new language. If you're not familiar with Verilog, those new syntax constructs may seem confusing.
This language looks like it attempted to solve a number of issues from the old verilog days, but wound up reinventing a very very small subset of system verilog instead of inventing something new.
arrays in lucid = system verilog arrays
"fsm" = basically system verilog enums and a little helper logic
"connectors" = system verilog interfaces
etc etc.
Its definitely better to go where the tool support is. With system verilog you get a lot of nice verification: constrained randomization, built in process synchronization, support for differentiated test bench vs dut, assertions, complex coverage metrics.
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[ 4.4 ms ] story [ 23.8 ms ] threadIts definitely better to go where the tool support is. With system verilog you get a lot of nice verification: constrained randomization, built in process synchronization, support for differentiated test bench vs dut, assertions, complex coverage metrics.