FPGAhacker
- Karma
- 2,611
- Created
- January 14, 2018 (8y ago)
- Submissions
- 0
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- Horizon is a free EDA package (github.com)
- Clang now makes binaries an original Pi B+ can't run (rachelbythebay.com)
- The Darién Gap (en.wikipedia.org)
- Io_uring basics: Writing a file to disk (notes.eatonphil.com)
- Universal Paperclips (decisionproblem.com)
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I’m recovering from Covid. My experience was pretty tame compared to what I’ve heard of others. My primary symptoms were heavy fatigue, nasal congestion, and headache. I did not experience loss of taste or smell. Also…
- The most bitter chemical compound known (en.wikipedia.org)
- The Poisson Process Explained (towardsdatascience.com)
- Delorean Hovercraft 14 (popyachts.com)
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Chisel came up on HN yesterday. It's a Scala based DSL for generating HDL. I've looked at it briefly a couple times, and I don't see the value prospect. Perhaps it is because I don't know Scala, and the idea of learning…
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I thought it might be of interest to the community for those of us with fpga/asic experience here, professional or otherwise, to do a Q&A. I do fpga and asic design, and verification, for a living; with a little clojure…