The I/O power consumption goes down very significantly when all the die-to-die interconnects have a small and well-defined capacitive loads. And I suppose that having all heat sources right next/on top of each other…
There is a tiny amount of extra capacitance on the net because of the reverse-biased junction of the antenna diode, but that's it. These diodes do get taken into account in when determining timing though.
Now go look at the need for antenna diodes in SOI technology:) with the substrate no longer the safe haven, a lot more oxides can be exposed to large differential voltages during manufacturing.
Thank you! You've voiced my thought exactly.
The I/O power consumption goes down very significantly when all the die-to-die interconnects have a small and well-defined capacitive loads. And I suppose that having all heat sources right next/on top of each other…
There is a tiny amount of extra capacitance on the net because of the reverse-biased junction of the antenna diode, but that's it. These diodes do get taken into account in when determining timing though.
Now go look at the need for antenna diodes in SOI technology:) with the substrate no longer the safe haven, a lot more oxides can be exposed to large differential voltages during manufacturing.
Thank you! You've voiced my thought exactly.