> I wish ARM64, RISC-V, and other modern ISAs had taken DEC Alpha AXP's idea of restricting all of the privileged instructions to the firmware This is already possible on RISC-V to some extend, by trapping privileged…
That's a cool achievement, but I imagine the single-switch decoder is a bit of a limiting design factor if this project grows (disabling/enabling instructions will introduce branches everywhere, and that's needed for…
See my nearby post on this thread, hope it'll explain stuff
Basically there are few design choices where it's substantially different to QEMU. Performance-wise: - Instead of a static translate-and-run flow like in QEMU, RVVM has an interpret-trace-run execution loop which is…
This is exactly what happened. I never though much about the imagery, it was a 5-min commit to "make README look nicer", and I actually have asthma as well (Never been much around smokers so maybe I don't have such…
I agree a lot, but RVVM implements an API to register new instructions at runtime, so I wanted to leave the core sources as much understandable and macro-free. Plus I don't see how other switch-based approaches in QEMU,…
> I wish ARM64, RISC-V, and other modern ISAs had taken DEC Alpha AXP's idea of restricting all of the privileged instructions to the firmware This is already possible on RISC-V to some extend, by trapping privileged…
That's a cool achievement, but I imagine the single-switch decoder is a bit of a limiting design factor if this project grows (disabling/enabling instructions will introduce branches everywhere, and that's needed for…
See my nearby post on this thread, hope it'll explain stuff
Basically there are few design choices where it's substantially different to QEMU. Performance-wise: - Instead of a static translate-and-run flow like in QEMU, RVVM has an interpret-trace-run execution loop which is…
This is exactly what happened. I never though much about the imagery, it was a 5-min commit to "make README look nicer", and I actually have asthma as well (Never been much around smokers so maybe I don't have such…
I agree a lot, but RVVM implements an API to register new instructions at runtime, so I wanted to leave the core sources as much understandable and macro-free. Plus I don't see how other switch-based approaches in QEMU,…