The (recent) SPARC Hypervisor does a fair job at this. Fujitsu has an interesting implementation. But it would be conceivably difficult to do this with time sharing on Intel chips without exposing side channels. That…
Why not? It’s arguably a way to make it slightly safer to run on Intel.
For so it is written.
The (recent) SPARC Hypervisor does a fair job at this. Fujitsu has an interesting implementation. But it would be conceivably difficult to do this with time sharing on Intel chips without exposing side channels. That…
Why not? It’s arguably a way to make it slightly safer to run on Intel.
For so it is written.