ckitching
No user record in our sample, but ckitching has activity below (stories or comments). Likely we have partial data — the full bulk-load will fill profiles in.
No user record in our sample, but ckitching has activity below (stories or comments). Likely we have partial data — the full bulk-load will fill profiles in.
The LLVM manual touches on some of the basics of why: https://llvm.org/docs/CompileCudaWithLLVM.html#dialect-diffe...
Not any more ;)
Prettymuch. Compilers can do a lot more than people give them credit for. At least AMD document their hardware so it is actually possible to know low-level details. PTX can obfuscate that surprisingly badly for nvidia…
Oh yes, we found all kinds of bugs in Nvidia's cuda implementation during this project :D. There's a bunch of pretty obscure functions in the device side apis too: some esoteric math functions, old simd "intrinsics"…
SCALE doesn't use cuBlas and friends. For those APIs, it uses either its own implementations of the functions, or delegates to an existing AMD library (such as rocblas). It wouldn't even be technically possible for…
The CUDA C APIs are supported as much in C as in C++ using SCALE! Cuda-fortran is not currently supported by scale since we haven't seen much use of it "in the wild" to push it up our priority list.
Indeed, no extra synchronisation is needed here due to the nature of the hardware (threads in a warp can't get out of sync with each other). Even on NVIDIA, you could've written this without the asm a discussed above!
I certainly would not attempt this feat with x86 `asm` blocks :D. PTX is indeed very pedestrian: it's more like IR than machine code, really. All the usual "machine-level craziness" that would otherwise make this…
NVCC is doing much better than before in terms of "broken C++". There was indeed a time when lots of modern C++ just didn't work. Nowadays the issues are more subtle and nasty. Subtle differences in overload resolution.…
Add one: it's trivial to add a compiler builtin to carry the instruction from the frontend to the backend if an instruction exists and the backend knows about it. If there's no instruction, either, you can write a C++…
I compiled your function with SCALE for gfx1030: .p2align 2 ; -- Begin function _Z15ptx_thread_voteff .type _Z15ptx_thread_voteff,@function _Z15ptx_thread_voteff: ; @_Z15ptx_thread_voteff ; %bb.0: ; %entry s_waitcnt…
Rather awkwardly, you've asked about an instruction that isn't currently implemented. :D Support for wmma and friends is in development. But in general the answer to your question is yes: we use AMD-specific builtins…
> Hi, why do you believe that bfloat16 is not supported? Apologies, I appear to be talking nonsense. I conflated bfloat16 with nvidia's other wacky floating point formats. This is probably my cue to stop answering…
> You might also find raw c++ for device libraries saner to deal with than cuda. Actually, we just compile all the device libraries to LLVM bitcode and be done with it. Then we can write them using all the…
Greetings, I work on SCALE. It appears we implemented `--threads` but not `-t` for the compiler flag. Oeps. In either case, the flag has no effect at present, since fatbinary support is still in development, and that's…
It works exactly as well as other AMDGPU-related software (HIP etc.) works inside Docker. There are some delightful AMD driver issues that make certain models of GPU intermittently freeze the kernel when used from…
[I work on SCALE] CUDA has a couple of extra problems beyond just any other programming language: - CUDA is more than a language: it's a giant library (for both CPU and GPU) for interacting with the GPU, and for writing…
Like this: https://docs.scale-lang.com/manual/how-to-use/#identifying-g...
You're right that most people only use a small subset of cuda: we prioritied support for features based on what was needed for various open-source projects, as a way to try to capture the most common things first. A…
[I work on SCALE] Mapping inline ptx to AMD machine code would indeed suck. Converting it to LLVM IR right at the start of compilation (when the initial IR is being generated) is much simpler, since it then gets…
Hi! Spectral engineer here! SCALE does not use any part of ZLUDA. We have modified the clang frontend to convert inline PTX asm block to LLVM IR. To put in a less compiler-engineer-ey way: for any given block of PTX,…
AMD have "MIOpen" which is basically cuDNN-for-AMD. Ish.