As toxic as Brian Krazinich was, you can’t really blame one person for the problem at Intel. Yes, he and Murthy initiated the layoffs. But then the orders were executed by mid/senior management. They are the ones who…
They know it matters, they just don’t have the competence to do it since they promoted a bunch of toadies and charlatans into their technical leadership, and also outsourced a ton of technical work to “low cost geo” so…
You are completely over-complicating things. P6 derivatives stuck with “traditional” Tomasulo algorithm for way too long. Everyone else moved to pointers for arch regs long before Intel did: MIPS 10k, DEC, AMD, Intel…
"Dunno why every comment implies there's some design gap that leads to M1 or AMD being more powerful or efficient." That is because there is a huge design gap. Intel architecture and design teams have always assumed on…
Will give him less than two years. High level individual contributors like him are absolute poison to the Intel bureaucracy.
Because Intel is too incompetent to design a CPU that can perform at 1 watt, which is what it takes to run 4 cores in a fanless chassis.
Yeah agreed. I was there through the high point, through when the company committed suicide and finally resigned when the corpse started to stink publicly. Blaming everything on the bean-counters is entirely misleading.…
It is quite a bit more than parity to slightly ahead. From 130nm to 22nm the Intel process advantage was enormous. That the horrible P4 architecture was able to compete and be cost-effective is testament to that. Intel…
That is the only way Intel can put up some half decent MT benchmark numbers without blowing out the die cost, since Intel’s P core is way too big and power hungry for the amount of performance it dishes out. On an…
As toxic as Brian Krazinich was, you can’t really blame one person for the problem at Intel. Yes, he and Murthy initiated the layoffs. But then the orders were executed by mid/senior management. They are the ones who…
They know it matters, they just don’t have the competence to do it since they promoted a bunch of toadies and charlatans into their technical leadership, and also outsourced a ton of technical work to “low cost geo” so…
You are completely over-complicating things. P6 derivatives stuck with “traditional” Tomasulo algorithm for way too long. Everyone else moved to pointers for arch regs long before Intel did: MIPS 10k, DEC, AMD, Intel…
"Dunno why every comment implies there's some design gap that leads to M1 or AMD being more powerful or efficient." That is because there is a huge design gap. Intel architecture and design teams have always assumed on…
Will give him less than two years. High level individual contributors like him are absolute poison to the Intel bureaucracy.
Because Intel is too incompetent to design a CPU that can perform at 1 watt, which is what it takes to run 4 cores in a fanless chassis.
Yeah agreed. I was there through the high point, through when the company committed suicide and finally resigned when the corpse started to stink publicly. Blaming everything on the bean-counters is entirely misleading.…
It is quite a bit more than parity to slightly ahead. From 130nm to 22nm the Intel process advantage was enormous. That the horrible P4 architecture was able to compete and be cost-effective is testament to that. Intel…
That is the only way Intel can put up some half decent MT benchmark numbers without blowing out the die cost, since Intel’s P core is way too big and power hungry for the amount of performance it dishes out. On an…