the basic argument reads to me as "taxing wealth at 100% would be bad policy (for various reasons), therefore taxing wealth (at all) is fundamentally bad policy". taxing income at 100% would also be bad policy - that…
"Doesn't even try" is too strong. "When compiling from the same source on independent infrastructure yields bit-by-bit identical results, this gives confidence that the build infrastructure was not compromised and the…
I intentionally said "more towards embarrassingly parallel" rather than "only embarrassingly parallel". I don't think there's a hard cutoff, but there is a qualitative difference. One example that springs to mind is…
The post says, about SIMT / GPU programming, "This loss results from the DRAM architecture quite directly, the GPU being unable to do much about it – similarly to any other processor." I would say that for SIMD the…
quite interesting framing. A couple things have changed since 2011 - SIMD (at least intel's AVX512) does have usable gather/scatter, so "Single instruction, multiple addresses" is no longer a flexibility win for SIMT vs…
what does this mean? "In LLVM IR, much like in Rust but unlike in C/C++, individual loads and stores are volatile (i.e., have compiler-invisible side-effects)."
the basic argument reads to me as "taxing wealth at 100% would be bad policy (for various reasons), therefore taxing wealth (at all) is fundamentally bad policy". taxing income at 100% would also be bad policy - that…
"Doesn't even try" is too strong. "When compiling from the same source on independent infrastructure yields bit-by-bit identical results, this gives confidence that the build infrastructure was not compromised and the…
I intentionally said "more towards embarrassingly parallel" rather than "only embarrassingly parallel". I don't think there's a hard cutoff, but there is a qualitative difference. One example that springs to mind is…
The post says, about SIMT / GPU programming, "This loss results from the DRAM architecture quite directly, the GPU being unable to do much about it – similarly to any other processor." I would say that for SIMD the…
quite interesting framing. A couple things have changed since 2011 - SIMD (at least intel's AVX512) does have usable gather/scatter, so "Single instruction, multiple addresses" is no longer a flexibility win for SIMT vs…
what does this mean? "In LLVM IR, much like in Rust but unlike in C/C++, individual loads and stores are volatile (i.e., have compiler-invisible side-effects)."