What security impact of the Haswell/early-Broadwell TSX bug? The support for all TSX instructions where really disabled by the microcode update, and we know that for sure because it crashed the world instantly (in…
Meh, for C2000, it can be also a sign of outdated firmware. We don't get microcode updates for SoCs in the general distribution: either your system vendor does a good job of keeping up with firmware updates, or you are…
Sort of. Removing the firmware-provided microcode update would likely kill Intel SGX support, though. And if UEFI is set for secure boot and its implementation happens to uses SGX or TXT for that, it probably will brick…
No, if you break the signature, something (processor microcode or the IME boot block?) will notice, and the system will either not start, or shutdown after ~30min. There is microcode-level integration between the IME…
Are you aware that the newer Xeons, and only the Xeons, have such an serial number facility available? Control over this processor identification facility is supposed to be offered as a user-accessible control in UEFI,…
Some (mostly not that relevant) details missing from the article: 1. CPU microcode update packages from Intel ("MCU") are unified "processor package" update containers. They update more areas of the chip other than just…
What security impact of the Haswell/early-Broadwell TSX bug? The support for all TSX instructions where really disabled by the microcode update, and we know that for sure because it crashed the world instantly (in…
Meh, for C2000, it can be also a sign of outdated firmware. We don't get microcode updates for SoCs in the general distribution: either your system vendor does a good job of keeping up with firmware updates, or you are…
Sort of. Removing the firmware-provided microcode update would likely kill Intel SGX support, though. And if UEFI is set for secure boot and its implementation happens to uses SGX or TXT for that, it probably will brick…
No, if you break the signature, something (processor microcode or the IME boot block?) will notice, and the system will either not start, or shutdown after ~30min. There is microcode-level integration between the IME…
Are you aware that the newer Xeons, and only the Xeons, have such an serial number facility available? Control over this processor identification facility is supposed to be offered as a user-accessible control in UEFI,…
Some (mostly not that relevant) details missing from the article: 1. CPU microcode update packages from Intel ("MCU") are unified "processor package" update containers. They update more areas of the chip other than just…