From my experience, it's very difficult to achieve low latency on modern Intel processors (after Sandy Bridge) because of SMI interrupts: https://en.wikipedia.org/wiki/System_Management_Mode Some of the SMI interrupts…
From my experience, it's very difficult to achieve low latency on modern Intel processors (after Sandy Bridge) because of SMI interrupts: https://en.wikipedia.org/wiki/System_Management_Mode Some of the SMI interrupts…