I guess they don't bother using Speedtest in Switzerland, as the average speed seems about the same as the US: https://www.speedtest.net/global-index Must be a sampling bias or something.
AMD's first Athlon chips did not run particularily hot. They needed a fan, just like Williamette chips, but actually used less power than the competition. The difference was they had no internal, on-chip diode. If the…
The plan doesn't involve running fabs again. Too expensive. IBM licenses their manufacturing technology (so far to Rapidus in Japan).
No, it stems from a lineage of Tegra chips that pre-date the M-Series. This chip was called GB10. One of its predecessors, GV10 was shipped in 2018. It was a 256 bit, unified-memory system on a chip with a Volta GPU and…
MediaTek designed X925 + A725 CPU. It's already been benchmarked in the GB10 products. It is not even close. Like 0.75x SPECint 2017 of the M5.
It's the same configuration as GB10. 20 core MediaTek 3nm part which is competitive with a AMD's 2025 16 core 4nm part with similar power draw. https://www.servethehome.com/wp-content/uploads/2026/05/cpu2...
What's the real cause of them being unable to price competitively? Is it DRAM, NAND flash storage, SoC cost, simply scale?
I must also admit to preferring Sim City 3000 over 4. I don't know if I can handle a 4K user interface without a magnifier, however.
I suspect general attitude to AI will split along those who had to apply for jobs in the post-AI world of automatic resume generation and filtering and those who didn't.
There's little reason at this price. I run both, Plex for people who are already used to it, and Jellyfin for myself and anyone new. At around ~$100 I think the Plex experience was better enough to justify it,…
Nethack embeds Lua 5.4.8, so you don't need it installed from a distribution's package manager. As long as your system can build C99* it can build Lua. And given that Nethack 5.0.0 is C99, this dependency is not…
@jasoneckert For the sake of science, can you disable your e cores and try this test again?
Question: do those vectorize code as in the example here? I was of the understanding they performed a more limited subset of optimizations.
Some instructions are microcoded but others take the fast path and avoid the microcode sequencer. Can't patch the latter in microcode RAM.
It does not. For any of the dual CCD parts AMD has ever released for consumers. Even Strix Halo which has higher bandwidth, lower latency interconnect doesn't make a single L3 across CCDs. It'll probably only happen…
Per compute die it functions as one 96M L3 with uniform latency. It is 4 cycles more latency than the configuration with smaller 32M L3. But there are two compute dies, each with their own L3. And like the 9950X…
> 16MB L2 (8MB per die?) It is indeed 8MB per compute die but really 1MB per core. Not shared among the entire CCD.
So do you have a lot of trust in people that "cannot hope of ever achieving a comfortable life"? It seems like a risky proposition.
>And the government did nothing. Why didn't a private investment company, even venture capital, extend them a bridge loan? It seems like the type of technology that could have decent returns in licensing fees. I ask…
Unfortunately Apple is learning to be as annoying too. I don't want to upgrade to Tahoe which is inscrutable to me. Maybe remind me next year. But they pop up every week reminding me to "upgrade" even though most the…
"Mainly" but they've been assaulting Russian boats and ships with USVs and submersibles. For example - https://en.wikipedia.org/wiki/Sea_Baby#Sub_Sea_Baby
No. It's trying to analyze the CPU core but clarifies the device under test as that may have performance implications. There is cooling and possibly manufactured configured power limits.
It's $2000
What resolution is that display?
Similar "stats" to the Seawolf class. Planned: 29 Completed: 3 Canceled: 26 Active: 3 Yet, unlike the Zumwalts, they are considered a good boat.
I guess they don't bother using Speedtest in Switzerland, as the average speed seems about the same as the US: https://www.speedtest.net/global-index Must be a sampling bias or something.
AMD's first Athlon chips did not run particularily hot. They needed a fan, just like Williamette chips, but actually used less power than the competition. The difference was they had no internal, on-chip diode. If the…
The plan doesn't involve running fabs again. Too expensive. IBM licenses their manufacturing technology (so far to Rapidus in Japan).
No, it stems from a lineage of Tegra chips that pre-date the M-Series. This chip was called GB10. One of its predecessors, GV10 was shipped in 2018. It was a 256 bit, unified-memory system on a chip with a Volta GPU and…
MediaTek designed X925 + A725 CPU. It's already been benchmarked in the GB10 products. It is not even close. Like 0.75x SPECint 2017 of the M5.
It's the same configuration as GB10. 20 core MediaTek 3nm part which is competitive with a AMD's 2025 16 core 4nm part with similar power draw. https://www.servethehome.com/wp-content/uploads/2026/05/cpu2...
What's the real cause of them being unable to price competitively? Is it DRAM, NAND flash storage, SoC cost, simply scale?
I must also admit to preferring Sim City 3000 over 4. I don't know if I can handle a 4K user interface without a magnifier, however.
I suspect general attitude to AI will split along those who had to apply for jobs in the post-AI world of automatic resume generation and filtering and those who didn't.
There's little reason at this price. I run both, Plex for people who are already used to it, and Jellyfin for myself and anyone new. At around ~$100 I think the Plex experience was better enough to justify it,…
Nethack embeds Lua 5.4.8, so you don't need it installed from a distribution's package manager. As long as your system can build C99* it can build Lua. And given that Nethack 5.0.0 is C99, this dependency is not…
@jasoneckert For the sake of science, can you disable your e cores and try this test again?
Question: do those vectorize code as in the example here? I was of the understanding they performed a more limited subset of optimizations.
Some instructions are microcoded but others take the fast path and avoid the microcode sequencer. Can't patch the latter in microcode RAM.
It does not. For any of the dual CCD parts AMD has ever released for consumers. Even Strix Halo which has higher bandwidth, lower latency interconnect doesn't make a single L3 across CCDs. It'll probably only happen…
Per compute die it functions as one 96M L3 with uniform latency. It is 4 cycles more latency than the configuration with smaller 32M L3. But there are two compute dies, each with their own L3. And like the 9950X…
> 16MB L2 (8MB per die?) It is indeed 8MB per compute die but really 1MB per core. Not shared among the entire CCD.
So do you have a lot of trust in people that "cannot hope of ever achieving a comfortable life"? It seems like a risky proposition.
>And the government did nothing. Why didn't a private investment company, even venture capital, extend them a bridge loan? It seems like the type of technology that could have decent returns in licensing fees. I ask…
Unfortunately Apple is learning to be as annoying too. I don't want to upgrade to Tahoe which is inscrutable to me. Maybe remind me next year. But they pop up every week reminding me to "upgrade" even though most the…
"Mainly" but they've been assaulting Russian boats and ships with USVs and submersibles. For example - https://en.wikipedia.org/wiki/Sea_Baby#Sub_Sea_Baby
No. It's trying to analyze the CPU core but clarifies the device under test as that may have performance implications. There is cooling and possibly manufactured configured power limits.
It's $2000
What resolution is that display?
Similar "stats" to the Seawolf class. Planned: 29 Completed: 3 Canceled: 26 Active: 3 Yet, unlike the Zumwalts, they are considered a good boat.