There is another architectural change made in Skylake which is related to this article. In skylake the L3 cache is now non-inclusive, which means that a core trying to acquire the lock will have to read the cache line…
There is another architectural change made in Skylake which is related to this article. In skylake the L3 cache is now non-inclusive, which means that a core trying to acquire the lock will have to read the cache line…