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Nice missing piece of the RISC-V ecosystem puzzle.
What is the performance impact of execute-in-place? Does a CPU executing instructions out of external RAM offer enough performance to be worthwhile?
This allows you the possibility of booting directly out of the SPI, where you put a first-stage bootloader that copies the rest of the system into RAM.

Lots of systems do this already by means of mask ROM bootloaders; some people might not want a fixed payload provided by someone else to be the first thing that executes. On the other hand, executing out of SPI is very interceptable.