Maybe try the turbo model which is transcription only. The other models were trained on x to en translations and they seem to emphasise the output language over the task token. You can get them to translate to any…
To read a single cache line from DDR4 (basically the same for DDR5 but I'm less familiar) the memory controller needs to: 1. send ACT 2. wait tRCD(RD) 3. send READ 4. wait tCL 5. read the burst from the DQ The original…
Nice, thanks for your work on everything Whisper related. I tested it a couple weeks ago which largely matched the results in the insanely fast whisper notebook. Comparison was with BetterTransformers. I just reran the…
It's beam size 1. From my quick tests on a Colab T4, CTranslate2 (faster-whisper's backend) is about 30% faster with like for like settings. I decoded the audio, got mel features, split into 30s segments, and ran it…
Maybe try the turbo model which is transcription only. The other models were trained on x to en translations and they seem to emphasise the output language over the task token. You can get them to translate to any…
To read a single cache line from DDR4 (basically the same for DDR5 but I'm less familiar) the memory controller needs to: 1. send ACT 2. wait tRCD(RD) 3. send READ 4. wait tCL 5. read the burst from the DQ The original…
Nice, thanks for your work on everything Whisper related. I tested it a couple weeks ago which largely matched the results in the insanely fast whisper notebook. Comparison was with BetterTransformers. I just reran the…
It's beam size 1. From my quick tests on a Colab T4, CTranslate2 (faster-whisper's backend) is about 30% faster with like for like settings. I decoded the audio, got mel features, split into 30s segments, and ran it…