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The end of Moore's law is like commercial fusion power--always just around the corner but it never seems to get here.

It does seem like we should stop counting how many transistors fit in how much space. At this point, size isn't the limiting factor. Tracking either the cost of a unit of processing power or the total processing power of the planet would be more meaningful in benchmarking technological progress.

The end of exponential growth is inevitable. We've reached the end of Moore's law as it applies to silicon wafers. We may be able to get to 5nm but no one really has an idea on how to do it and make a profit. Alternate technologies are just theoretical ideas that have no timeline for commercialization.

The main point of the decline of Moore's law is that it is about economics as much as it is about the size of the features on a chip. Even if someone does figure out how to get to 5nm it may not be cost effective to mass produce chips at that size. Already we see that Intel can't afford to keep up with shrinking scale as they've moved away from their tick-tock cadence to tick-tock-tock. Intel has the most advanced materials research in the world and they can't make it work cost effectively. That indicates pretty clearly that the exponential scaling of transistors is over. Smaller transistors may still be possible or new materials may emerge but the future scaling isn't going to happen on Dr. Moore's timetable which is the basis for Moore's law.

> Even if someone does figure out how to get to 5nm it may not be cost effective to mass produce chips at that size.

On top of that, it is not quite clear what would the hardware designers achieve with an increased transistor budget. CPU cores are becoming increasingly small in comparison to the surrounding circuitry (graphics, caches, control logic). We are bumped on clock speeds, too.

Mostly lower power from what I understand. Do phones, tablets, and small laptops really need more than 4 cores? Probably not. So the only thing you get is lower power and maybe smaller chips (which can help with the economics).
If you only run one NodeJS app at a time, probably not
The obvious answer would be adding more CPU cores and surrounding circuitry. Especially on mobile it probably also makes a lot of sense to move more algorithms from software to hardware.
>Especially on mobile it probably also makes a lot of sense to move more algorithms from software to hardware.

Well that would seem to call for adding specialized coprocessors or even FPGA's, not just more CPU cores.

I don't think AES or video decoding uses coprocessors or FPGAs, that's just implemented more or less like any other instruction.

If you're going complete coprocessor, you can do much more like Apple has done with their motion coprocessors or the secure enclave.

I do wish Intel would make a high TDP i7 with improved single thread performance. I would even be OK with a water cooler.

The lack of progress on thread perf is a huge problem.

Applied Materials presented a roadmap on how we might get to 3 nm using disappointingly conventional semiconductor processing techniques[0]. In short, you make the transistors tall and thin.

[0] https://web.archive.org/web/20130810001315/http://www.semico...

Maybe. Most of the presentation is beyond my knowledge level. But the 10nm & 7nm design is showing using a III-V FinFET. As far as I know, no one has that working yet. And as far as I can tell, this doesn't talk much about lithography. Multi patterning is reportedly going to be problem at 10nm and lower and EUV isn't ready yet either.
Moore's law (as it is generally talked about) is actually a pretty good indication of how much computational power we can get from a single processor core.

That, combined with Amdahl's law, means that the unmistakable levelling off that we're seeing now will place some pretty firm limits on what we can compute until we move off of silicon.

> Moore's law (as it is generally talked about) is actually a pretty good indication of how much computational power we can get from a single processor core.

Imagine that we have the technology in place to manufacture silicon chips at 2nm. How would we design CPU cores with a substantially better single-thread performance, when clock speed is limited? Optimization techniques like OoO execution and register renaming have already been pushed to their extremes. Increasing caches beyond a certain point has been shown to deliver diminishing returns.

We just don't know fundamentally how to design a substantially faster CPU core.

One option is to have multiple cores dedicated to the same workload and then switch between them as they heat up. There are many issues with this approach which make it impractical, but if your really do want speed at any cost then it may be worth it.

PS: It's a Gatling CPU...

And all you would need to sell them to the Army would be to make it play the "BRRRRRRRRRRRRRRRT!" from a GAU-8 over the system speaker whenever it is actively crunching numbers.
I don't disagree at all. There might be some gains to be had from stacking things high in 3D (reducing the physical distances a little). And there's clearly some room for improvement on the compute power per watt front, but even if (for example) the Mill CPU pans out, my impression is that there's not a huge amount of territory left in that direction either (at least on silicon), and the impact on max single-core performance would be limited.

So yeah, the party's definitely over and it's down to more efficient software at this point until we get optical computing or rod logic or something crazy like that.

Doesn't most speed critical software fit a parallel model ?
You didnt see extreme yet. Extreme superscalar would be cores capable of executing 16 independent instructions per clock, not 4 (current intel max). Instead we got SIMD and multicores, or moves in reverse directions like HT.

Not to mention there is lots of room for improvement on the memory front, stalls kill performance.

I agree.

Going by a more general version of Moore's Law (cost of equivalent processing power being halved about every 18 months) then I don't see any end in sight, though we might need to change paradigms on what processing power means every now and then.

''After the 28nm node, we can continue to make transistors smaller, but not cheaper.'' As computer vision and reinforcement learning improved dramatically in the last few years, robots will take over a lot of manufacturing jobs of humans, so as long as there's enough demand to finance robot developments and there's no serious material shortage, I don't see why the cost could not go down to the cost of the material itself + development cost + robot cost in the following years.
Semiconductor mfg. is a chemical process, not a digital process. So robots won't help.
Robots, and better robotics will help...

The more that can be automated, automatically repaired / etc, the cheaper things get and the less humans will be potentially exposed to hazardous chemicals.

It won't improve single core performance, but it will go a long way towards making devices cost less.

The fabrication plants are highly automated. The cost is mostly capital costs for equipment.
What is the biggest cost in the equipment? I'm sure a big part of it is engineering but there must be expensive hand craft part as well.
Can we quit with the Moore's law bullshit? It's not a law! It's just an observation about the direction a graph seems to be moving.

Yeah, we hope processors keep getting more powerful. Calling this "Moore's law" is idiotic. And probably confuses poor journalists and undergrads.

In all fairness the article says:

"Despite its official sound, it is not actually a scientific rule like Newton’s laws of motion. Instead, it describes the pace of change in a manufacturing process that has made computers exponentially more affordable."

It is amazingly interesting and coincidental that the 'law' seems to hold true, year after year.
What ever happened to processors made with synthetic diamond? If I recall correctly, diamond has incredible heat transmission capability, so diamond processors made at the same density as current silicon processors could run at higher (and hotter) clock rates.
Given that both diamond and graphene are both just carbon, what's the difference between the two approaches?
What does sharing a common element have to do with anything? They are allotropes (https://en.wikipedia.org/wiki/Allotropes_of_carbon) - diamond, graphite, fullerenes, SWNT, etc all have very different properties.
Well, I'm not a chemist or anything but I, maybe naively, thought that the properties would be similiar. More similar to each other than to silicon anyway.

I mean it's similiarity that makes you think of carbon as an alternative to silicon rather than some other element, no?

They have a similar resistance from electromigration, but nothing more.

The atoms configuration dictate everything in organic chemistry. (And in inorganic too, but you rarely have alternative configurations there.)

Diamond's electronic and optical properties are far more similar to those of silicon than they are to graphite, graphene, or other forms of carbon. Diamond and silicon are diamond cubic lattices with sp3 hybridization (tetrahedral), graphite and related planar allotropes have sp2 hybridization (triangular).
The article also mentions graphene. Carbon in different forms has different properties, so, in theory there could be something valuable about using synthetic diamond.
I think one of the difficulties with diamond was that n-type doping was very difficult in the past. However, there have been a huge number of improvements in fabricating various diamond-based devices (driven primarily by the development of various color center in diamond for applications in quantum optics, quantum computing), so it's likely to become more plausible in the future.

I don't know much about the relative performance of diamond transistors versus silicon transistors, so I can't say anything concretely about that. I could maybe see some sort of diamond solution being used as an add-on to current silicon technologies whereby the diamond helps enhance heat transport/cooling of the silicon device.

So there's two obvious ways for faster machines, one of which we can do today: 1) Move off of silicon. 2) Write better code.
I'm kind of skeptical we'll move off of silicon any time soon, but fortunately, I think there's still a lot we can do with silicon. We aren't nearly done optimizing hardware. Then there's the promise of 3D stacking, optical interconnects, more cores and more memory bandwidth.
> optical interconnects

This leads on to less heat which means you can stack the layers more. 3D chips. Cram more cores in, layer memory into the mix.

From an article a while ago, I was convinced that the next generation of computers would be built on memristors... Allowing you to dynamically allocate memory and computation resources in a 3D framework. And photonics would be used to connect multiple computing units.

Is any of this feasible or realistic?

Sounds a bit like using FPGAs for everything. I actually think we'll start seeing a lot more of that sort of thing once tooling for FPGAs stops sucking.
I don't think moving off of silicon will help all that much. What would you move to? Germanium I guess, but I don't think you'll get a factor of 10 from that. We're already down to a scale where the feature size isn't much larger than the atoms themselves.
I think some types of computation can be done with optical processors orders of magnitude faster. It's still early days but I think really interesting

http://www.optalysys.com http://www.lighton.io

Hmmm, interesting. Another problem is memory latency. Actual throughput is usually about 10% of advertised throughput because programmers and compilers can't give the processor useful work to do for most of the clock cycles. My source for this 10% figure is from some slides from Ulrich Drepper, but I don't have time to find them right now.
A big obvious candidate is organics. It is not clear what kinds of short term gains are possible, nor what kinds of designs it would allow. But it looks very likely that the theoretical optimum substrate will turn out to be some kind of organic compost.

If not them, there are all kinds of III-V crystals. They come with their own share of problems, but they might be good for something beyond LEDs.

I think the greatest help from any non-silicon design will be from better heat dissipation and lower leakage. Those still have a lot of room to improve.

Would organic processing actually be any faster? A human brain is capable of more than an Intel CPU in some ways due to its complexity, not due to its speed. And obviously the brain falls short of the CPU in many many ways.
Organic transistors are stuff made of nanotubes, graphene, diamond, polypropilene, poly-benzoates, and other stuff like that. Not cells, RNA and protein (although, who knows? maybe there's something on them).
Moore's law is as much about economics as it is about shrinking. For all you code types, switching to a new device is not just as simple as fabricating a new chip in a research lab. Thousands of experimental devices and chips have been made in many research labs. Moore's law is about being able to consistently manufacture more and more millions (and now at billions) of very small transistors every generation (for silicon, this used to be about 1-1.5 years in the late 90's early 2000's).
The next step is specialization. Developing an ASIC makes more sense if there isn't going to be a general purpose x86 that eats your lunch in 5 years just by brute clock speed.
The upside of the end of Moore's law is that hardware should stabilize as the focus goes from making things faster to making things easier to work with. I think there are already trends in this direction with projects like RISC-V.
I think the focus will go toward making hardware more power efficient instead of faster.
Power efficiency and size reduction go hand in hand. The gate capacitance is reduced at lower geometry, and you can also reduce the core voltage. Both of which directly contribute to power.

The only other way to reduce power is by clock gating, which pretty much happens these days on any decent SoC design targeted at mobile.

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